Electronic device, electronic module and methods for fabricating the same

Patent metadata

Field	Value
Publication number	US-11615963-B2
Application number	US-202016926162-A
Country	US
Kind code	B2
Filing date	Jul 10, 2020
Priority date	Sep 21, 2016
Publication date	Mar 28, 2023
Grant date	Mar 28, 2023

Abstract

An electronic device, an electronic module comprising the electronic device and methods for fabricating the same are disclosed. In one example, the electronic device includes a semiconductor substrate and a metal stack disposed on the semiconductor substrate, wherein the metal stack comprises a first layer, wherein the first layer comprises NiSi.

First claim

The invention claimed is:

1. An electronic device, comprising:
a carrier;
a semiconductor substrate; and
a metal stack disposed on the semiconductor substrate between the semiconductor substrate and the carrier and electrically connecting the semiconductor substrate to the carrier, the metal stack comprising:
a first layer, wherein the first layer comprises NiSi; and

a diffusion solder bond between the carrier and the semiconductor substrate, wherein the diffusion solder bond comprises patches comprising a higher concentration of Si than the first layer.

2. The electronic device according to claim 1 , wherein the diffusion solder bond comprises intermetallic phases.

3. The electronic device according to claim 1 , wherein the semiconductor substrate comprises one or more of a power semiconductor chip, an IGBT, and a diode and wherein the metal stack is arranged on a chip pad of the power semiconductor chip, IGBT, or diode.

4. The electronic device according to claim 1 , wherein the metal stack comprises N impurities in the first layer, in the form of one or more of NiN and SiN.

5. The electronic device according to claim 1 , wherein the metal stack further comprises a second layer disposed between the first layer and the semiconductor substrate, the second layer comprising one or more of Ti, WTi, Ta or an alloy comprising at least one of these materials.

6. The electronic device according to claim 1 , wherein the metal stack further comprises a further layer disposed between the semiconductor substrate and the first layer, the further layer comprising one or more of Al and Ti.

7. The electronic device according to claim 1 , wherein the first layer has a thickness in the range of 50 nm to 2000 nm and wherein the first layer comprises an amount of Si in the range of 2 wt % to 50 wt %.

8. The electronic device according to claim 1 , wherein the metal stack completely cover a backside of the semiconductor substrate.

9. An electronic module, comprising:
a carrier;
a semiconductor chip disposed on the carrier; and
a metal stack disposed between the carrier and the semiconductor chip and electrically connecting the semiconductor chip to the carrier, the metal stack comprising:
a first layer comprising NiSi;
a second layer between the first layer and the semiconductor chip; and
a diffusion solder bond comprising intermetallic phases between the first layer and the carrier, wherein the diffusion solder bond comprises patches comprising a higher concentration of Si than the first layer.

10. The electronic module according to claim 9 , wherein the carrier comprises a power electronic substrate, a leadframe, a DCB, a DAB, an AMB, an IMS or a PCB.

11. The electronic module according to claim 9 , further comprising an encapsulation body encapsulating the semiconductor chip.

12. The electronic module according to claim 9 , wherein the diffusion solder bond comprises a Pb-based or a Pb-free solder.

13. The electronic module according to claim 12 , wherein the diffusion solder bond comprises Sn or SnAg.

14. The electronic module according to claim 9 , wherein the metal stack completely covers a backside of the semiconductor chip.

15. The electronic module according to claim 9 , wherein the metal stack comprises N impurities.

16. The electronic module according to claim 15 , wherein N impurities are located along an interface between the first layer and the diffusion solder bond.

17. A method for fabricating an electronic module, comprising:
providing a carrier and a semiconductor substrate;
disposing a metal stack comprising a first layer comprising NiSi and a second layer on the semiconductor substrate;
disposing a solder layer between the first layer and the carrier; and
diffusion soldering the semiconductor substrate onto the carrier to form intermetallic phases between the first layer and the carrier and to electrically connect the semiconductor substrate to the carrier,
wherein disposing the first layer on the semiconductor substrate comprises sputtering in the presence of a process gas, and
wherein after diffusion soldering the solder layer comprises patches comprising a higher concentration of Si than the first layer.

18. The method according to claim 17 , wherein sputtering comprises a magnetron sputtering process.

19. The method according to claim 17 , wherein the process gas comprises N, wherein the amount of N in the process gas is about 80%, and wherein the process gas further comprises Ar, Xe, Kr or Ne.

20. The method according to claim 17 , wherein the first layer completely covers the backside of the semiconductor substrate.

Assignees

• Infineon Technologies Ag

Inventors

• Frank Paul
• Adema Gretchen
• Bertaud Thomas
• Ehmann Michael
• Graetz Eric
• Karlovsky Kamil
• Napetschnig Evelyn
• Robl Werner
• Schmidt Tobias
• Seifert Joachim
• Wagner Frank
• Woehlert Stefan

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/952

  comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W72/59

  Bond pads specially adapted therefor · CPC title

• H10W72/01938

  in gaseous form, e.g. by CVD or PVD · CPC title

• H10W72/07336

  Soldering or alloying · CPC title