Semiconductor device package and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-11600901-B2
Application number	US-201916506654-A
Country	US
Kind code	B2
Filing date	Jul 9, 2019
Priority date	Jul 9, 2019
Publication date	Mar 7, 2023
Grant date	Mar 7, 2023

Abstract

A semiconductor device package includes a substrate and an antenna module. The substrate has a first surface and a second surface opposite to the first surface. The antenna module is disposed on the first surface of the substrate with a gap. The antenna module has a support and an antenna layer. The support has a first surface facing away from the substrate and a second surface facing the substrate. The antenna layer is disposed on the first surface of the support. The antenna layer has a first antenna pattern and a first dielectric layer.

First claim

What is claimed is:

1. A semiconductor device package comprising:
a substrate having a first surface and a second surface opposite to the first surface; and
an antenna module disposed on the first surface of the substrate, the antenna module comprising:
a support physically separated from the substrate and having a first surface facing away from the substrate and a second surface facing the substrate;
an antenna layer disposed on the first surface of the support, the antenna layer having a first antenna pattern and a first dielectric layer;
a circuit layer including a second dielectric layer disposed on the second surface of the support, a second antenna pattern disposed on the second dielectric layer and a plurality of pads surrounded by the second dielectric layer, wherein at least one of the pads is electrically connected to the second antenna pattern, wherein the pads are physically separated from the second antenna pattern;
a conductive pillar penetrating the support and electrically connecting the first antenna layer to the pads; and
an electrical contact electrically connecting the pads to the substrate.

2. The semiconductor device package of claim 1 , wherein the antenna element further includes a dielectric layer disposed between the antenna layer and the support and a conductive via penetrating the dielectric layer and electrically connecting the antenna layer to the conductive pillar, wherein a width of the conductive via adjacent to the support is greater than a width of the conductive via far away from the support.

3. The semiconductor device package of claim 1 , wherein the antenna element includes at least two lateral surfaces recessed from lateral surfaces of the substrate.

4. The semiconductor device package of claim 1 , wherein a height of the conductive pillar is substantially the same as a thickness of the support.

5. The semiconductor device package of claim 1 , further comprising an electronic component disposed on the second surface of the substrate and electrically connected to the antenna module.

Assignees

• Advanced Semiconductor Eng

Inventors

• Ho Cheng-Lin
• Lee Chih-Cheng
• Chen Chun Chen
• Yu Yuanhao

Classifications

• H10W74/117

  the substrate having spherical bumps for external connection · CPC title

• H10W44/248

  for antennas · CPC title

• H10W44/20

  at high-frequency [HF] or radio frequency [RF] · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title