High voltage monolithic LED chip with improved reliability

US11588083B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11588083-B2
Application numberUS-202016944356-A
CountryUS
Kind codeB2
Filing dateJul 31, 2020
Priority dateJun 24, 2011
Publication dateFeb 21, 2023
Grant dateFeb 21, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another to minimize the visibility of the space during operation. The LED chips can also comprise layers structures and compositions that allow improved reliability under high current operation.

First claim

Opening claim text (preview).

What is claimed is: 1. A monolithic LED chip, comprising: a plurality of active regions on a submount; electrically conductive interconnect elements between active regions of the plurality of active regions, wherein said interconnect elements are in electrical contact with said active regions on a same side of said active regions; first reflective elements that are aligned with streets between adjacent active regions of the plurality of active regions; and second reflective elements arranged around an edge of one or more active regions of the plurality of active regions. 2. The monolithic LED chip of claim 1 , wherein the first and second reflective elements comprise a higher reflectivity than a reflectivity of said interconnect elements. 3. The monolithic LED chip of claim 1 , wherein said interconnect elements comprises a material that resists electromigration under high current operation. 4. The monolithic LED chip of claim 1 , wherein the first reflective elements are arranged below said plurality of active regions, and arranged between the plurality of active region and the electrically conductive interconnect elements. 5. The monolithic LED chip of claim 1 , wherein the first reflective elements and second reflective elements are electrically isolated from said interconnect elements. 6. The monolithic LED chip of claim 1 , wherein the first reflective elements and second reflective elements comprise discontinuous portions of at least one reflective layer. 7. The monolithic LED chip of claim 1 , wherein said interconnect elements comprise a plurality of layers in a stack. 8. The monolithic LED chip of claim 7 , wherein said plurality of layers comprises at least one adhesion/barrier layer and at least one electrically conductive layer. 9. The monolithic LED chip of claim 1 , wherein said interconnect elements comprise a conductive layer sandwiched between layers of material having higher resistance to electromigration than said conductive layer. 10. The monolithic LED chip of claim 1 , wherein each active region of the plurality of active regions has an associated primary emission surface that comprises at least a portion of a growth surface on which epitaxial layers of said active region was grown. 11. The monolithic LED chip of claim 10 , wherein said primary emission surface is textured. 12. The monolithic LED chip of claim 1 , wherein said interconnect elements connect at least two active regions of the plurality of active regions in series. 13. The monolithic LED chip of claim 1 , wherein said interconnect elements connect at least two active regions of the plurality of active regions in parallel. 14. The monolithic LED chip of claim 1 , wherein said interconnect elements connect at least two active regions of the plurality of active regions in series-parallel. 15. A monolithic LED chip, comprising: an LED chip structure that is divided into a plurality of active regions such that a distance between adjacent active regions of the plurality of active regions is no more than 15 microns; electrically conductive interconnect elements between active regions of the plurality of active regions; and first reflective elements that are aligned with streets between adjacent active regions of the plurality of active regions. 16. The monolithic LED chip of claim 15 , wherein the distance between adjacent active regions of the plurality of active regions is no more than 10 microns. 17. The monolithic LED chip of claim 15 , wherein the distance between adjacent active regions of the plurality of active regions is no more than 5 microns. 18. The monolithic LED chip of claim 15 , wherein the distance between adjacent active regions of the plurality of active regions is no more than 1 micron. 19. The monolithic LED chip of claim 15 , wherein the distance between adjacent active regions of the plurality of active regions is in a range from 0.05 microns to no more than 15 microns. 20. The monolithic LED chip of claim 15 , wherein the interconnect elements are in electrical contact with the plurality of active regions on a same side of the plurality of active regions. 21. The monolithic LED chip of claim 15 , wherein the first reflective elements comprise a higher reflectivity than a reflectivity of the interconnect elements. 22. The monolithic LED chip of claim 15 , wherein the interconnect elements comprise a material that resists electromigration under high current operation. 23. The monolithic LED chip of claim 15 , wherein the first reflective elements are arranged below said plurality of active regions, and arranged between the plurality of active region and the electrically conductive interconnect elements. 24. The monolithic LED chip of claim 15 , wherein the first reflective elements are electrically isolated from said interconnect elements. 25. The monolithic LED chip of claim 15 , further comprising second reflective elements that are arranged around an edge of one or more active regions of the plurality of active regions. 26. The monolithic LED chip of claim 25 , wherein the first reflective elements and second reflective elements comprise discontinuous portions of at least one reflective layer. 27. The monolithic LED chip of claim 15 , wherein the plurality of active regions are provided on a growth substrate. 28. The monolithic LED chip of claim 27 , wherein the growth substrate comprises sapphire. 29. The monolithic LED chip of claim 27 , wherein the growth substrate comprises silicon carbide.

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

  • Die-attach connectors and bond wires · CPC title

  • Package configurations · CPC title

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What does patent US11588083B2 cover?
Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of …
Who is the assignee on this patent?
Creeled Inc
What technology area does this patent fall under?
Primary CPC classification H10H20/857. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 21 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).