High voltage monolithic LED chip

Patent metadata

Field	Value
Publication number	US-9728676-B2
Application number	US-201314050001-A
Country	US
Kind code	B2
Filing date	Oct 9, 2013
Priority date	Jun 24, 2011
Publication date	Aug 8, 2017
Grant date	Aug 8, 2017

Abstract

Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another with at least some of the active regions having a space between adjacent ones of the active regions that is 10 percent or less of the width of one or more of the active regions. The space is substantially not visible when the LED chip is emitting, such that the LED chips emits light similar to a filament.

First claim

We claim:

1. A monolithic LED chip, comprising:
a plurality of active regions on a submount;
integral electrically conductive interconnect elements in electrical contact with said plurality of active regions and electrically connecting at least some active regions of said plurality of active regions in series, wherein said interconnect elements are completely embedded within said submount; and
one or more integral insulating layers surrounding at least a portion of said interconnect elements and isolating said at least a portion of said interconnect elements from other elements of said monolithic LED chip.

2. The monolithic LED chip of claim 1 , wherein said interconnect elements and said one or more integral insulating layers are integral to said submount.

3. The monolithic LED chip of claim 1 , wherein said interconnect elements and said one or more integral insulating layers are integral to said plurality of active regions.

4. The monolithic LED chip of claim 1 , wherein said interconnect elements comprise a metal layer and a plurality of vias.

5. The monolithic LED chip of claim 1 , wherein said submount further comprises lower electrically conductive elements, wherein one insulating layer of said one or more integral insulating layers is arranged between (i) said lower electrically conductive elements and (ii) said interconnect elements and said plurality of active regions.

6. The monolithic LED chip of claim 5 , wherein said lower electrically conductive elements comprise a mirror and/or a bond metal.

7. The monolithic LED chip of claim 1 , wherein active regions of said plurality of active regions are linearly arranged on said submount.

8. The monolithic LED chip of claim 1 , having an operating voltage that approximately equals a sum of junction voltages of said plurality of active regions.

9. The monolithic LED chip of claim 1 , wherein at least some adjacent active regions of said plurality of active regions are separated from one another by a space that is substantially not visible when said monolithic LED chip is emitting.

10. The monolithic LED chip of claim 1 , wherein at least some adjacent active regions of the plurality of active regions are separated from one another by a space that is 10 percent or less of a width of one or more of said at least some adjacent active regions.

11. The monolithic LED chip of claim 1 , wherein said plurality of active regions is formed separately from said submount and is mounted on said submount.

12. A monolithic LED chip, comprising:
a plurality of active regions on a submount and configured to emit light, wherein at least some active regions of said plurality of active regions are interconnected in series with at least one serial interconnection extending entirely within an interior of said monolithic LED chip without being exposed along an outer surface of said monolithic LED chip, and wherein at least some adjacent active regions of said plurality of active regions are separated from one another by a space that is 10 percent or less of a width of one or more of said adjacent active regions, such that said space is substantially not visible when said monolithic LED chip is emitting.

13. The monolithic LED chip of claim 12 , wherein said space is 2.5% or less of the width of the one or more of said adjacent active regions.

14. The monolithic LED chip of claim 12 , wherein said space is 1.5% or less of the width of the one or more of said adjacent active regions.

15. The monolithic LED chip of claim 12 , wherein the at least one serial interconnection comprises a plurality of integral electrically conductive interconnect elements in electrical contact with said at least some active regions.

16. The monolithic LED chip of claim 15 , wherein said plurality of integral electrically conductive interconnect elements comprises a metal layer and a plurality of vias.

17. The monolithic LED chip of claim 15 , wherein said submount comprises an integral insulator element electrically insulating at least some electrically conductive interconnect elements of said plurality of integral electrically conductive interconnect elements and said at least some active regions from portions of said submount.

18. The monolithic LED chip of claim 17 , wherein at least a portion of said plurality of integral electrically conductive interconnect elements is buried in said integral insulator element.

19. The monolithic LED chip of claim 17 , wherein said integral insulator element comprises one or more insulation layers.

20. The monolithic LED chip of claim 12 , wherein said at least some active regions are linearly arranged on said submount.

21. The monolithic LED chip of claim 12 , wherein an operating voltage of said monolithic LED chip approximately equals a sum of junction voltages of said plurality of active regions.

22. A light source, comprising:
a housing defining an opening; and
a monolithic LED chip mounted within said housing and configured to transmit LED emissions out said opening, said monolithic LED chip comprising:
a plurality of active regions mounted on a submount, with each active region of the plurality of active regions in close proximity to at least one other active region of the plurality of active regions, such that adjacent active regions of the plurality of active regions are separated from one another by a space that is substantially not visible when said adjacent active regions are emitting; and
at least one electrical connection extending between at least one pair of active regions of the plurality of active regions and completely within said submount without being exposed along an outer surface of said monolithic LED chip.

23. The light source of claim 22 , wherein the LED emissions of said monolithic LED chip are similar to light emissions of a filament.

24. The light source of claim 22 , wherein said space is 10 percent or less of a width of one or more of said adjacent active regions.

25. The light source of claim 24 , wherein said space is 5% or less of the width of the one or more of said adjacent active regions.

26. The light source of claim 24 , wherein said space is 1.5% or less of the width of the one or more of said adjacent active regions.

27. The light source of claim 23 , wherein said at least one electrical connection comprises a plurality of integral electrically conductive interconnect elements in electrical contact with said at least one pair of active regions and electrically connecting said at least one pair of active regions in series.

28. The light source of claim 27 , wherein said plurality of integral electrically conductive interconnect elements comprises a metal layer and a plurality of vias.

29. The light source of claim 27 , wherein said submount comprises an integral insulator element electrically insulating at least some integral electrically conductive interconnect elements of said plurality of integral electrically conductive interconnect elements and said plurality of active regions from portions of said submount.

30. The light source of claim 29 , wherein said integral insulator element comprises one or more insulation layers.

31. The light source of claim 22 , wherein active regions of said plurality of active regions are linearly arranged on said submount.

32. The light source of claim 22 ,

Assignees

• Cree Inc

Inventors

• Haberern Kevin W
• Donofrio Matthew
• Langsdorf Bennett
• Place Thomas
• Bergmann Michael John

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W90/00

  Package configurations · CPC title

• H01L2224/48247

  Electricity · mapped topic