Shape memory thermal capacitor and methods for same

US11558957B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11558957-B2
Application numberUS-202016900390-A
CountryUS
Kind codeB2
Filing dateJun 12, 2020
Priority dateJun 12, 2020
Publication dateJan 17, 2023
Grant dateJan 17, 2023

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An electronic assembly including a thermal capacitor. An electronic substrate of the electronic assembly includes one or more insulating layers and one or more conductor layers provided along the one or more insulating layers. The one or more conductor layers including a conductive material. A shape memory thermal capacitor is received in the electronic substrate. The shape memory thermal capacitor includes a shape memory core including a shape memory material.

First claim

Opening claim text (preview).

The invention claimed is: 1. An electronic assembly including a thermal capacitor comprising: an electronic substrate including: one or more insulating layers; and one or more conductor layers provided along the one or more insulating layers, the one or more conductor layers including a conductive material; and a shape memory thermal capacitor received in the electronic substrate, the shape memory thermal capacitor includes: a shape memory core including a shape memory material; and an interface jacket coupled along the shape memory core, the interface jacket isolates the shape memory core from the one or more conductor layers, and the interface jacket includes a matching conductive material to the conductive material of the one or more conductor layers. 2. The electronic assembly of claim 1 , wherein the shape memory material includes a solid-to-solid phase change material having a corresponding phase change latent heat absorption. 3. The electronic assembly of claim 1 , wherein the shape memory material includes a Nickel Titanium alloy. 4. The electronic assembly of claim 1 , wherein the interface jacket includes a plurality of component layers. 5. The electronic assembly of claim 4 , wherein the plurality of component layers include: a seed layer directly coupled with the shape memory core, wherein the seed layer encloses the shape memory core; and a bond layer enveloping the seed layer and the shape memory core, wherein the bond layer includes the conductive material, and the bond layer is coupled with the one or more conductor layers of the electronic substrate. 6. The electronic assembly of claim 5 , wherein the plurality of component layers include a ductile interface layer interposed between the seed layer and the bond layer, and the ductile interface layer has a greater ductility relative to the seed layer. 7. The electronic assembly of claim 6 , wherein the seed layer includes an electroless plated material and the ductile interface layer includes an electrolytic plated material. 8. The electronic assembly of claim 1 , wherein the conductive material and the matching conductive material are identical. 9. The electronic assembly of claim 1 , wherein the one or more conductor layers having conductive material are bonded with the interface jacket having the matching conductive material. 10. The electronic assembly of claim 1 , wherein the shape memory thermal capacitor is plated into the electronic substrate with the conductive material. 11. The electronic assembly of claim 1 comprising a heat generating electronic device coupled with the electronic substrate, and the shape memory thermal capacitor is proximate to the heat generating electronic device. 12. A shape memory thermal capacitor for electronic devices, the shape memory thermal capacitor comprising: a shape memory core including a shape memory material with a solid-to-solid phase change material having a corresponding phase change latent heat absorption; and an interface jacket coupled along the shape memory core, the interface jacket encapsulates the shape memory core, and the interface jacket includes: a seed layer coupled with the shape memory core, wherein the seed layer encloses the shape memory core; and a bond layer coupled around the seed layer and the shape memory core, wherein the bond layer includes a conductive material. 13. The shape memory thermal capacitor of claim 12 , wherein one or more of the seed layer or the bond layer isolates the shape memory core from an exterior environment. 14. The shape memory thermal capacitor of claim 12 , wherein one or more of the seed layer or the bond layer fully encapsulates the shape memory core. 15. The shape memory thermal capacitor of claim 12 , wherein the interface jacket includes an interface ductile layer interposed between the seed layer and the bond layer, and the ductile interface layer has a greater ductility relative to the seed layer. 16. The shape memory thermal capacitor of claim 15 , wherein the seed layer includes an electroless plated material and the ductile interface layer includes an electrolytic plated material. 17. The shape memory thermal capacitor of claim 15 , wherein one or both of the seed layer or the ductile interface layer include nickel, and the bond layer includes copper. 18. The shape memory thermal capacitor of claim 12 , wherein the shape memory material includes a nickel titanium alloy. 19. A method for making an electronic assembly comprising: forming a shape memory thermal capacitor having a shape memory material, forming includes: encapsulating a shape memory core with an interface jacket including: enclosing the shape memory core with a seed layer; applying a bond layer around the seed layer and the shape memory core, wherein the bond layer includes a conductive material; and isolating the shape memory core from an electronic substrate and processing of the electronic substrate with the interface jacket; and installing the shape memory thermal capacitor within the electronic substrate including: positioning the shape memory thermal capacitor within a capacitor recess of the electronic substrate; anchoring the shape memory thermal capacitor to the electronic substrate; and interconnecting the bond layer having the conductive material with one or more conductive components of the electronic substrate having a matching conductive material. 20. The method of claim 19 , wherein anchoring the shape memory thermal capacitor includes plating the shape memory thermal capacitor with conductive plating including the conductive material. 21. The method of claim 19 , wherein encapsulating the shape memory core includes applying an interface ductile layer over the seed layer; and applying the bond layer includes applying the bond layer over the interface ductile layer. 22. The method of claim 21 , wherein enclosing the shape memory core with the seed layer includes electroless plating the seed layer to the shape memory core; and applying the interface ductile layer includes electrolytic plating the interface ductile layer over the seed layer. 23. The method of claim 19 , wherein interconnecting the bond layer having the conductive material with the one or more conductive components of the electronic substrate having the matching conductive material includes the conductive material and the matching conductive material are identical.

Assignees

Inventors

Classifications

  • Metallic blocks or heatsinks completely inserted in a PCB · CPC title

  • Apparatus or processes for manufacturing printed circuits · CPC title

  • H05K1/0204Primary

    using means for thermal conduction connection in the thickness direction of the substrate (H05K1/0207 takes precedence) · CPC title

  • Shape memory alloy [SMA] · CPC title

  • H05K1/0203Primary

    Cooling of mounted components (H05K1/0272 takes precedence) · CPC title

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What does patent US11558957B2 cover?
An electronic assembly including a thermal capacitor. An electronic substrate of the electronic assembly includes one or more insulating layers and one or more conductor layers provided along the one or more insulating layers. The one or more conductor layers including a conductive material. A shape memory thermal capacitor is received in the electronic substrate. The shape memory thermal capac…
Who is the assignee on this patent?
Raytheon Co, Us Army
What technology area does this patent fall under?
Primary CPC classification H05K1/0204. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 17 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).