Power amplifier

Patent metadata

Field	Value
Publication number	US-11558017-B2
Application number	US-201916575133-A
Country	US
Kind code	B2
Filing date	Sep 18, 2019
Priority date	Sep 18, 2019
Publication date	Jan 17, 2023
Grant date	Jan 17, 2023

Abstract

A power amplifier circuit includes a current generator and a current mirror driver. The current generator has a first input connected to a first voltage supply and an output configured to generate a first current. The current generator includes a first transistor, a second transistor, a first resistor and a second resistor. The first transistor has an emitter connected to ground. The second transistor has a base connected to a base of the first transistor and an emitter connected to ground. The first resistor is connected between the first voltage supply and a collector of the first transistor. The second resistor is connected between the first voltage supply and a collector of the second transistor. The current mirror drive has a first input connected to the output of the current generator to receive the first current and an output configured to generate a second current.

First claim

What is claimed is:

1. A power amplifier circuit comprising:
a current generator having a first input connected to a first voltage supply and an output configured to generate a first current, the current generator comprising:
a first transistor having an emitter connected to ground;
a second transistor having a base connected to a base of the first transistor and an emitter connected to ground;
a first resistor connected between the first voltage supply and a collector of the first transistor;
a second resistor connected between the first voltage supply and a collector of the second transistor;
a third transistor having a base connected to a second voltage supply, an emitter connected to the base of the first transistor and a collector connected to the collector of the first transistor; and
a fourth transistor having an emitter connected to the collector of the first transistor, wherein a base of the fourth transistor and a collector of the fourth transistor are connected to the first resistor; and

a current mirror driver having a first input connected to the output of the current generator to receive the first current and an output configured to generate a second current.

2. The power amplifier circuit of claim 1 , wherein the first current has a variation of current less than 0.2% as the first voltage supply has a variation of voltage about 2V.

3. The power amplifier circuit of claim 1 , wherein a resistance of the first resistor is substantially the same as a resistance of the second resistor.

4. The power amplifier circuit of claim 1 , wherein a ratio of a resistance of the first resistor to a resistance of the second resistor is about 2:1.

5. The power amplifier circuit of claim 1 , wherein the current generator further comprises:
a third resistor connected between the emitter of the first transistor and ground; and
a fourth resistor connected between the emitter of the second transistor and ground.

6. The power amplifier circuit of claim 1 , further comprising:
a fifth transistor having an emitter connected to the output of the current generator and a collector connected to a second input of the current mirror driver;
a fifth resistor connected between the collector and a base of the fifth transistor; and
a sixth resistor connected between the second voltage supply and the base of the fifth transistor.

7. The power amplifier circuit of claim 1 , wherein the current mirror driver comprises:
a sixth transistor having an emitter connected to ground and a collector connected to the output of the current generator;
a seventh transistor having a base connected to a second input of the current mirror driver, an emitter connected to a base of the sixth transistor and a collector connected to a third voltage supply;
a seventh resistor connected between the base of the sixth transistor and the emitter of the seventh transistor; and
an eighth resistor connected between the emitter of the seventh transistor and the output of the current mirror driver.

8. The power amplifier circuit of claim 7 , wherein the current mirror driver further comprises a ninth resistor connected between the base of the sixth transistor of the current mirror driver and the eighth resistor of the current mirror driver.

9. The power amplifier circuit of claim 1 , further comprising an eighth transistor having an emitter connected to ground, a base connected to the output of the current mirror driver and configured to receive the second current, and a collector connected to an output match element (OMN).

10. The power amplifier circuit of claim 1 , wherein the output of the current mirror driver is connected to an input matching element (IMN).

11. The power amplifier circuit of claim 1 , wherein the first current has a variation of current less than 1.5% as an operating temperature of the power amplifier varies from about −55° C. to about 125° C.

12. The power amplifier circuit of claim 1 , wherein the current generator and the current mirror driver solely include one kind of transistors, and wherein the transistors are heterojunction bipolar transistors (HBT).

13. The power amplifier circuit of claim 9 , wherein the eighth transistor is configured to generate a third current based on the second current, wherein the third current is independent to the change of an operating temperature of the power amplifier circuit.

14. A power amplifier circuit comprising:
a current generator having a first input connected to a first voltage supply and an output configured to generate a first current, wherein
the first current has a variation of current less than 1.5% as an operating temperature of the power amplifier circuit varies from about −55° C. to about 125° C.; and
the first current has a variation of current less than 0.2% as the first voltage supply has a variation of voltage about 2V;
a current mirror driver having a first input connected to the output of the current generator to receive the first current and an output configured to generate a second current; and
a zero-gain switch configured to maintain a voltage of a second input of the current mirror driver at a substantially constant voltage,
wherein the zero-gain switch comprises:
a first transistor having an emitter connected to the output of the current generator and a collector connected to the second input of the current mirror driver;
a first resistor connected between the collector and a base of the first transistor; and
a second resistor connected between a second voltage supply and the base of the first transistor.

15. The power amplifier circuit of claim 14 , further comprising a third transistor having an emitter connected to ground, a base connected to the output of the current mirror driver and configured to receive the second current, and a collector connected to an output match element (OMN).

16. The power amplifier circuit of claim 14 , wherein the current generator further comprises a second input connected to the second voltage supply, wherein the first current has a variation of current less than 0.2% as the second voltage supply has a variation of voltage about 2.8V.

17. The power amplifier circuit of claim 16 , wherein the first current is about 0 mA as the second voltage supply is less than 2.4V.

18. The power amplifier circuit of claim 14 , wherein the current generator include only one kind of transistors, and wherein the transistors are heterojunction bipolar transistors (HBT).

Assignees

• Advanced Semiconductor Eng

Inventors

• Ding Jaw-Ming

Classifications

• H03F3/191

  Tuned amplifiers (H03F3/193, H03F3/195 take precedence) · CPC title

• H03F3/213

  in integrated circuits · CPC title

• H03F1/302 Primary

  in bipolar transistor amplifiers (H03F1/303, H03F1/305, H03F1/307 take precedence) · CPC title

• H03F1/0211 Primary

  with control of the supply voltage or current · CPC title

• H03F3/20 Primary

  Power amplifiers, e.g. Class B amplifiers, Class C amplifiers (H03F3/26 - H03F3/30 take precedence) · CPC title