Power optimized prefetching in set-associative translation lookaside buffer structure

Patent metadata

Field	Value
Publication number	US-11556475-B2
Application number	US-202117215287-A
Country	US
Kind code	B2
Filing date	Mar 29, 2021
Priority date	Mar 29, 2021
Publication date	Jan 17, 2023
Grant date	Jan 17, 2023

Abstract

A computer system includes a processor and a prefetch engine. The processor is configured to generate a demand access stream. The prefetch engine is configured to initiate a first prefetch request based on the demand access stream and perform a first prefetch that includes performing a translation lookaside buffer (TLB) lookup on a TLB structure in response to the first prefetch request. The processor determines a TLB entry in response to performing the TLB lookup and performs at least one second prefetch based on the TLB entry without performing a subsequent TLB lookup on the TLB structure.

First claim

What is claimed is:

1. A computer-implemented method for performing prefetching in a computer processing system, the method comprising:
generating, by a processor, a demand access stream;
initiating, via a prefetch engine, a first prefetch request based on the demand access stream and performing a first prefetch that includes performing a translation lookaside buffer (TLB) lookup on an N-way set associative TLB structure in response to the first prefetch request;
determining a TLB entry in response to performing the TLB lookup; and
performing at least one second prefetch based on the TLB entry without performing a subsequent TLB lookup on the TLB structure,
where performing the first prefetch comprises:
performing the TLB lookup on a plurality of TLB directories included in the N-way set associative TLB structure;
determining an index value (set, way) based on the TLB entry obtained from a given TLB directory among the TLB directories;
accessing a given TLB payload among a plurality of TLB payloads included in the N-way set associative TLB structure based on the index value (set, way); and
reading from the given TLB payload a physical address corresponding to the index value (set, way).

2. The computer-implemented method of claim 1 , wherein the at least one second prefetch is performed immediately following the first prefetch.

3. The computer-implemented method of claim 1 , wherein the at least one second prefetch includes a plurality of subsequent prefetches performed repeatedly without performing the subsequent TLB lookup on the plurality of TLB directories.

4. The computer-implemented method of claim 1 , wherein performing the at least one second prefetch without performing the subsequent TLB lookup on the TLB structure comprises:
storing, in a memory unit, the index value (set, way) data determined in response to performing the TLB lookup;
generating, via the prefetch engine, a first TLB lookup bypass signal that halts performing a subsequent TLB lookup after performing the TLB lookup in response to the first prefetch request; and
accessing the given TLB payload based on the stored index value (set, way) data.

5. The computer-implemented method of claim 4 , further comprising:
detecting, via the prefetch engine, a page boundary cross event;
generating, via the prefetch engine, a second TLB lookup bypass signal that invokes performing the subsequent TLB lookup after performing the at least one second prefetch;
determining new index value (set, way) data in response to performing the subsequent TLB lookup associated with a subsequent prefetch request;
accessing the given TLB payload included in the N-way set associative TLB structure based on the new (set, way) data; and
reading from the TLB payload block a physical address corresponding to the new index value (set, way).

6. The computer-implemented method of claim 5 , further comprising:
storing each index value (set, way) data corresponding to a respective prefetch request;
monitoring the plurality of TLB directories and generating a TLB reload signal indicating a change in the TLB entry corresponding to current index value (set, way) data included in the given TLB directory;
comparing the current index value (set, way) data with the stored index value set, way); and
performing at least one recovery action in response to determining the current index value (set, way) matches the stored index value (set, way).

7. A computer system comprising:
a processor configured to generate a demand access stream; and
a prefetch engine configured to initiate a first prefetch request based on the demand access stream and perform a first prefetch that includes performing a translation lookaside buffer (TLB) lookup on an N-way set associative TLB structure in response to the first prefetch request,
wherein the processor determines a TLB entry in response to performing the TLB lookup and performs at least one second prefetch based on the TLB entry without performing a subsequent TLB lookup on the TLB structure,
wherein the processor is further configured to perform the TLB lookup on a plurality of TLB directories included in the N-way set associative TLB structure, determine an index value (set, way) based on the TLB entry obtained from a given TLB directory among the TLB directories, access a given TLB payload among a plurality of TLB payloads included in the N-way set associative TLB structure based on the index value (set, way), and read from the given TLB payload a physical address corresponding to the index value (set, way).

8. The computer system of claim 7 , wherein the at least one second prefetch is performed immediately following the first prefetch.

9. The computer system of claim 7 , wherein the at least one second prefetch includes a plurality of subsequent prefetches performed repeatedly without performing the subsequent TLB lookup on the plurality of TLB directories.

10. The computer system of claim 7 , further comprising:
a memory unit configured to store the index value (set, way) data determined in response to performing the TLB lookup,
wherein the prefetch engine generates a first TLB lookup bypass signal that halts performing a subsequent TLB lookup after performing the TLB lookup in response to the first prefetch request, and
wherein the processor access the given TLB payload based on the stored index value (set, way) data.

11. The computer system of claim 10 , wherein the prefetch engine is configured to detect a page boundary cross event, to generate a second TLB lookup bypass signal that invokes performing the subsequent TLB lookup after performing the at least one second prefetch, to determine new index value (set, way) data in response to performing the subsequent TLB lookup associated with a subsequent prefetch request, to access the given TLB payload included in the N-way set associative TLB structure based on the new (set, way) data, and to read from the TLB payload block a physical address corresponding to the new index value (set, way).

12. The computer system of claim 11 , further comprising a page table walker configured to wherein the memory unit is configured to store each index value (set, way) data corresponding to a respective prefetch request,
wherein the page table walker is configured to monitor the plurality of TLB directories, and to generate a TLB reload signal indicating a change in the TLB entry corresponding to current index value (set, way) data included in the given TLB directory, and
wherein the prefetch engine is configured to compare the current index value (set, way) data with the stored index value set, way), and perform at least one recovery action in response to determining the current index value (set, way) matches the stored index value (set, way).

13. A computer program product to control a computer processing system to perform prefetching, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by an electronic computer processor to control the computer processing system to perform operations comprising:
generating a demand access stream;
initiating a first prefetch request based on the demand access stream and performing a first prefetch that includes performing a translation lookaside buffer (TLB) lookup on an N-way set associative TLB structure in response to the first prefetch request;
determining a TLB entry in response to performing the TLB lookup; and
performing at least one second prefetch based on the TLB entry without performing a subsequent TLB lookup on the TLB structure,
where performing the first prefetc

Assignees

• IBM

Inventors

• Campbell David
• Rohrbaugh Iii George W
• Truelove Jake
• Kriegel Jon K
• Wait Charles D
• Joyner Jody

Classifications

• G06F12/0862 Primary

  with prefetch · CPC title

• G06F2212/6024

  History based prefetching · CPC title

• G06F2212/655

  Same page detection · CPC title

• G06F12/1054

  the data cache being concurrently physically addressed · CPC title

• G06F2212/681

  Multi-level TLB, e.g. microTLB and main TLB · CPC title