Semiconductor die, semiconductor package and substrate dicing method
US-2024421000-A1 · Dec 19, 2024 · US
US11515264B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11515264-B2 |
| Application number | US-201916421707-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 24, 2019 |
| Priority date | May 25, 2018 |
| Publication date | Nov 29, 2022 |
| Grant date | Nov 29, 2022 |
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A method for processing a semiconductor wafer is proposed. The method may include reducing a thickness of the semiconductor wafer. A carrier structure is placed on a first side of the semiconductor wafer, e.g. before or after reducing the thickness of the semiconductor wafer. The method further includes providing a support structure on a second side of the semiconductor wafer opposite to the first side, e.g. after reducing the thickness of the semiconductor wafer. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.
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What is claimed is: 1. A method for processing a semiconductor wafer, the method comprising: welding at least one support structure onto the semiconductor wafer; and reducing a thickness of the semiconductor wafer before or after welding the at least one support structure onto the semiconductor wafer. 2. The method of claim 1 , wherein welding the at least one support structure onto the semiconductor wafer comprises: placing the at least one support structure on the semiconductor wafer; and irradiating light through the at least one support structure or through the semiconductor wafer to form a weld region, wherein the weld region is an interface between the at least one support structure and the semiconductor wafer, and/or a joining structure between the at least one support structure and the semiconductor wafer. 3. The method of claim 2 , wherein light of a first wavelength is irradiated through the at least one support structure, and wherein at least 50% of the light of the first wavelength impinging on the support structure is transmitted through the support structure and reaches the weld region. 4. The method of claim 1 , further comprising: before welding the at least one support structure, forming an absorption region on the semiconductor wafer or on the at least one support structure. 5. The method of claim 4 , wherein the absorption region comprises a silicide layer. 6. The method of claim 5 , wherein the silicide layer is a nickel silicide layer, a cobalt silicide layer or a titanium silicide layer. 7. The method of claim 4 , wherein the absorption region comprises a polysilicon layer or an amorphous silicon layer. 8. The method of claim 4 , wherein forming the absorption region comprises implanting ions so that the absorption region comprises a doping concentration of at least 1·10 19 cm 3 . 9. The method of claim 4 , further comprising: before reducing the thickness of the semiconductor wafer, forming an electrical element structure of a semiconductor device at a front side of the semiconductor wafer, wherein forming the electrical element structure comprises of forming a polycrystalline silicon layer and/or forming a metallization layer, wherein the absorption region comprises a part of the polycrystalline silicon layer and/or the metallization layer. 10. The method of claim 1 , wherein the at least one support structure comprises a ring structure or a grid structure. 11. The method of claim 1 , wherein the at least one support structure comprises at least one ring segment structure and/or at least one circular structure. 12. The method of claim 1 , wherein the at least one support structure is welded to a front side of the semiconductor wafer, and wherein the method further comprises: before reducing the thickness of the semiconductor wafer, placing a carrier structure at the front side of the semiconductor wafer. 13. The method of claim 12 , further comprising: before placing the carrier structure at the front side, filling a gap between the semiconductor wafer and the carrier structure with foam material. 14. The method of 12 , further comprising: after reducing the thickness of the semiconductor wafer, removing the carrier structure. 15. The method of claim 1 , further comprising: after welding the at least one support structure onto the semiconductor wafer, processing the semiconductor wafer at a temperature of at least 400° C.
Fillings or auxiliary members in containers, e.g. centering rings (fillings or auxiliary members for thermal protection or control in containers or encapsulations H10W40/70) · CPC title
protecting against mechanical damage (H10W76/00, H10W74/00 take precedence) · CPC title
Electricity · mapped topic
Electricity · mapped topic
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