Silicide structure of an integrated transistor device and method of providing same

Patent metadata

Field	Value
Publication number	US-11476334-B2
Application number	US-201816957055-A
Country	US
Kind code	B2
Filing date	Feb 8, 2018
Priority date	Feb 8, 2018
Publication date	Oct 18, 2022
Grant date	Oct 18, 2022

Abstract

Techniques and mechanisms for providing functionality of a transistor which comprises a conformal layer of a gate work function silicide. In an embodiment, the transistor comprises a channel region and a gate dielectric which extends and adjoins the channel region. The gate dielectric also adjoins a layer structure of the transistor, the layer structure comprising a silicide. The silicide includes silicon and a component D which comprises a non-metal element from one of Groups IIIa, IVa, or Va. In another embodiment, the silicide further comprises a component M which includes a transition metal element from one of Groups IVb, Vb, VIb, VIIB, or VIIIb and/or which includes a metal element from one of Groups IIIa, IVa, or Va.

First claim

What is claimed is:

1. An integrated circuit (IC) device comprising:
a substrate;
a fin structure extending in a first direction from the substrate, wherein the fin structure comprises a channel region of a transistor structure, the channel region comprising a semiconductor;
a sidewall structure which extends in the first direction from the substrate;
a first layer which extends in the first direction along a side of the fin structure, and which adjoins the channel region, the first layer comprising a dielectric material; and
a second layer which extends along and adjoins a side of the first layer, the second layer comprising a silicide, wherein the second layer further extends across a recess region to each of the sidewall structure and the side of the first layer, and further extends along a portion of the sidewall structure, wherein a maximum vertical extent of the second layer along the sidewall structure is less than a maximum vertical extent of the sidewall structure, and is more than a maximum vertical extent of the second layer over the fin structure, wherein the second layer is substantially conformal to a curved or angled surface, wherein an average minimum thickness of the second layer is equal to or less than 20 nanometers (nm), and wherein a span of the second layer along a height of the curved or angled surface is greater than or equal to a distance equal to three times the average minimum thickness of the second layer.

2. The IC device of claim 1 , wherein the silicide comprises:
silicon;
one or more elements each from a respective one of Group Ma, Group IVa, or Group Va; and
at least two metals, wherein a first of the at least two metals is from Group Ma, Group IVa, Group Va, Group IVb, Group Vb, Group VIb, Group VIIB, or Group VIIIb.

3. The IC device of claim 2 , wherein the at least two metals comprises aluminum (Al), gallium (Ga), hafnium (Hf), indium (In), niobium (Nb), osmium (Os), ruthenium (Ru), tantalum (Ta), titanium (Ti), tungsten (W), yttrium (Y), or zirconium (Zr).

4. The IC device of claim 2 , wherein a second of the at least two metals is from Group Ma, Group IVa, Group Va, Group IVb, Group Vb, Group VIb, Group VIIB, or Group VIIIb.

5. The IC device of claim 1 , wherein the silicide comprises silicon and a component M which comprises:
one or more transition metal elements each from a respective one of Group IVb, Group Vb, Group VIb, Group VIIB, or Group VIIIb; or
one or more metal elements each from a respective one of Groups Ma, Group IVa, or Group Va.

6. The IC device of claim 5 , wherein the component M comprises metals M1 and M2 each of a different respective metal type.

7. The IC device of claim 5 , wherein the component M comprises aluminum (Al), hafnium (Hf), tantalum (Ta), titanium (Ti), or tungsten (W).

8. The IC device of claim 1 , wherein the channel region extends, along a length of the fin structure, between a source region of the transistor structure and a drain region of the transistor structure, wherein a perimeter of the second layer forms an edge structure which extends in parallel with the length of the fin structure.

9. A system comprising:
an integrated circuit (IC) device comprising:
a substrate;
a fin structure extending in a first direction from the substrate, wherein the fin structure comprises a channel region of a transistor structure, the channel region comprising a semiconductor;
a sidewall structure which extends in the first direction from the substrate;
a first layer which extends in the first direction along a side of the fin structure, and which adjoins the channel region, the first layer comprising a dielectric material; and
a second layer which extends along and adjoins a side of the first layer, the second layer comprising a silicide, wherein the second layer further extends across a recess region to each of the sidewall structure and the side of the first layer, and further extends along a portion of the sidewall structure, wherein a maximum vertical extent of the second layer along the sidewall structure is less than a maximum vertical extent of the sidewall structure, and is more than a maximum vertical extent of the second layer over the fin structure, wherein the second layer is substantially conformal to a curved or angled surface, wherein an average minimum thickness of the second layer is equal to or less than 20 nanometers (nm), and wherein a span of the second layer along a height of the curved or angled surface is greater than or equal to a distance equal to three times the average minimum thickness of the second layer; and

a display device coupled to the IC device, the display device to display an image based on the signal.

10. The system of claim 9 , wherein the silicide comprises:
silicon;
one or more elements each from a respective one of Group Ma, Group IVa, or Group Va; and
at least two metals, wherein a first of the at least two metals is from Group Ma, Group IVa, Group Va, Group IVb, Group Vb, Group VIb, Group VIIB, or Group VIIIb.

11. The system of claim 10 , wherein the at least two metals comprises aluminum (Al), gallium (Ga), hafnium (Hf), indium (In), niobium (Nb), osmium (Os), ruthenium (Ru), tantalum (Ta), titanium (Ti), tungsten (W), yttrium (Y), or zirconium (Zr).

12. The system of claim 9 , wherein the silicide comprises silicon and a component M which comprises:
one or more transition metal elements each from a respective one of Group IVb, Group Vb, Group VIb, Group VIIB, or Group VIIIb; or
one or more metal elements each from a respective one of Groups Ma, Group IVa, or Group Va.

13. The system of claim 12 , wherein the component M comprises metals M1 and M2 each of a different respective metal type.

Assignees

• Intel Corp

Inventors

• Acton Orb
• Steigerwald Joseph
• Murthy Anand
• Maddox Scott
• Hu Jenny

Classifications

• H10D64/0132

  the conductor being a metallic silicide · CPC title

• H01L29/1054 Primary

  Electricity · mapped topic

• H01L29/41791

  Electricity · mapped topic

• H01L29/785

  Electricity · mapped topic

• H01L29/4975

  Electricity · mapped topic