System and device including memristor material

US11469373B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11469373-B2
Application numberUS-202017017313-A
CountryUS
Kind codeB2
Filing dateSep 10, 2020
Priority dateSep 10, 2020
Publication dateOct 11, 2022
Grant dateOct 11, 2022

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A system may include a first conductive plate configured at least to receive an input signal. The system may include a second conductive plate configured at least to output an output signal. The system may further include a memristor material positioned between the first conductive plate and the second conductive plate.

First claim

Opening claim text (preview).

What is claimed is: 1. A system, comprising: a first conductive plate configured at least to receive an input signal; a second conductive plate configured at least to output an output signal; a memristor material positioned between the first conductive plate and the second conductive plate; and a permanent modification material and a transfer rate modification material, the permanent modification material positioned between the first conductive plate and the second conductive plate, the transfer rate modification material positioned between the first conductive plate and the second conductive plate, the permanent modification material and the transfer rate modification material being in parallel electrically, wherein at least a portion of the permanent modification material abuts the memristor material, wherein at least a portion of the transfer rate modification material abuts the memristor material, wherein a combination of the permanent modification material and the transfer modification material provides a modification to the output signal after a signal is driven from the second conductive plate to the first conductive plate. 2. The system of claim 1 , wherein the memristor material comprises at least one of: at least one metal sulfide, at least one metal selenide, at least one metal telluride, at least one metal nitride, at least one metal phosphite, or at least one metal arsenide. 3. The system of claim 1 , wherein the memristor material abuts a first surface area of the first conductive plate, wherein the memristor material abuts a second surface area of the second conductive plate, wherein the first surface area and the second surface area are different. 4. The system of claim 3 , wherein opposing faces of the first and second conductive plates have different surface areas. 5. The system of claim 3 , further comprising a blocking material positioned between the first conductive plate and the second conductive plate, the blocking material abutting the memristor material and one of the first conductive plate or the second conductive plate. 6. The system of claim 1 , further comprising a transfer rate modification material, the transfer rate modification material positioned between the first conductive plate and the second conductive plate, wherein at least a portion of the transfer rate modification material abuts the memristor material, wherein the transfer rate modification material provides a shift in a stabilization time to the output signal after a signal is driven from the second conductive plate to the first conductive plate. 7. The system of claim 6 , further comprising a memristor, the memristor comprising the first conductive plate, the second conductive plate, the memristor material, permanent modification material, and the transfer rate modification material, wherein the memristor is a notch filter. 8. The system of claim 1 , further comprising a memristor, the memristor comprising the first conductive plate, the second conductive plate, and the memristor material, and the permanent modification material, wherein the memristor has a current-voltage (I-V) curve, wherein the output signal has a signature based at least on the I-V curve. 9. The system of claim 8 , further comprising a circuit, wherein the signature of the output signal is indicative of at least one of an identity or an authenticity of an electronic component, wherein the circuit is configured to use the signature of the output signal for at least one of: anti-piracy, cyber security authentication, or unique data storage. 10. The system of claim 8 , further comprising an integrated circuit (IC), the IC comprising the memristor, wherein the IC is a memory device or a radiofrequency (RF) tuning device. 11. The system of claim 1 , further comprising a device, the device comprising the first conductive plate, the second conductive plate, the memristor material, the permanent modification material, a third conductive plate, a dielectric material, a first terminal electrically coupled to the first conductive plate, a second terminal electrically coupled to the second conductive plate, and a third terminal electrically coupled to the third conductive plate, wherein the dielectric material is positioned between the second conductive plate and the third conductive plate, wherein the device has memristor functionality and capacitor functionality, wherein the device is a bandpass filter. 12. A method, comprising: providing a first conductive plate configured at least to receive an input signal; providing a second conductive plate configured at least to output an output signal; providing a memristor material positioned between the first conductive plate and the second conductive plate; and providing a permanent modification material and a transfer rate modification material, the permanent modification material positioned between the first conductive plate and the second conductive plate, the transfer rate modification material positioned between the first conductive plate and the second conductive plate, the permanent modification material and the transfer rate modification material being in parallel electrically, wherein at least a portion of the permanent modification material abuts the memristor material, wherein at least a portion of the transfer rate modification material abuts the memristor material, wherein a combination of the permanent modification material and the transfer modification material provides a modification to the output signal after a signal is driven from the second conductive plate to the first conductive plate. 13. A system, comprising: a first conductive plate configured at least to receive an input signal; a second conductive plate configured at least to output an output signal; a memristor material positioned between the first conductive plate and the second conductive plate; and a permanent modification material, the permanent modification material positioned between the first conductive plate and the second conductive plate, wherein at least a portion of the permanent modification material abuts the memristor material, wherein the permanent modification material provides a permanent signal modification to the output signal after a signal is driven from the second conductive plate to the first conductive plate, wherein the memristor material abuts a first surface area of the first conductive plate, wherein the memristor material abuts a second surface area of the second conductive plate, wherein the first surface area and the second surface area are different, wherein the permanent signal modification is a permanent asymmetric signal modification. 14. The system of claim 13 , wherein the memristor material comprises at least one of: at least one metal sulfide, at least one metal selenide, at least one metal telluride, at least one metal nitride, at least one metal phosphite, or at least one metal arsenide. 15. The system of claim 13 , wherein the memristor material abuts a first surface area of the first conductive plate, wherein the memristor material abuts a second surface area of the second conductive plate, wherein the first surface area and the second surface area are different. 16. The system of claim 15 , wherein opposing faces of the first and second conductive plates have different surface areas. 17. The system of claim 15 , further comprising a blocking material positioned between the first conductive plate and the second conductive plate, the blocking material abutting the memristor material and one of the first conductive plate or the second conductive plate.

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • H10N70/24Primary

    based on migration or redistribution of ionic species, e.g. anions, vacancies · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11469373B2 cover?
A system may include a first conductive plate configured at least to receive an input signal. The system may include a second conductive plate configured at least to output an output signal. The system may further include a memristor material positioned between the first conductive plate and the second conductive plate.
Who is the assignee on this patent?
Rockwell Collins Inc
What technology area does this patent fall under?
Primary CPC classification H01L45/1233. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 11 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).