Methods of forming memory devices including stair step structures

US11430734B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11430734-B2
Application numberUS-202017134930-A
CountryUS
Kind codeB2
Filing dateDec 28, 2020
Priority dateMar 11, 2016
Publication dateAug 30, 2022
Grant dateAug 30, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Conductive structures include stair step structures positioned along a length of the conductive structure and at least one landing comprising at least one via extending through the conductive structure. The at least one landing is positioned between a first stair step structure of the stair step structures and a second stair step structure of the stair step structures. Devices may include such conductive structures. Systems may include a semiconductor device and stair step structures separated by at least one landing having at least one via formed in the at least one landing. Methods of forming conductive structures include forming at least one via through a landing positioned between stair step structures.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of forming a memory device, comprising: forming openings through a stack comprising conductive material alternating with dielectric material at a landing of the stack between at least two stair step structures, the at least two stair step structures positioned on one side of and in electrical communication with semiconductor pillars extending through the stack; forming conductive contacts in the openings, the conductive contacts in electrical communication with a control unit underlying the stack; and electrically coupling the conductive contacts to additional conductive contacts on steps of one or more of the at least two stair step structures to electrically couple at least some of the conductive material of the stack to the control unit. 2. The method of claim 1 , further comprising: forming a preliminary stack comprising sacrificial material alternating with the dielectric material; forming slots extending through the preliminary stack; exhuming at least some of the sacrificial material of the preliminary stack through the slots; and forming the conductive material in recesses formed by exhuming the at least some of the sacrificial material to form the stack. 3. The method of claim 2 , wherein forming a preliminary stack comprises: forming the sacrificial material to comprise dielectric oxide material; and forming the dielectric material to comprise dielectric nitride material. 4. The method of claim 2 , wherein exhuming at least some of the sacrificial material comprises only partially exhuming the sacrificial material such that portions of the sacrificial material remain laterally adjacent the recesses. 5. The method of claim 2 , wherein forming the conductive material in recesses formed by exhuming the at least some of the sacrificial material comprises: filling the recesses and the slots with the conductive material; and removing portions of the conductive material within areas of the slots to form additional slots while maintaining additional portions of the conductive material with areas of the recesses. 6. The method of claim 5 , further comprising filling the additional slots with additional dielectric material. 7. The method of claim 1 , further comprising forming the openings within an area of the landing free of the conductive material alternating with the dielectric material. 8. The method of claim 1 , further comprising forming a dielectric liner within the openings prior to forming the conductive contacts in the openings. 9. The method of claim 8 , wherein forming a dielectric liner within the openings comprises forming the dielectric liner on portions of the conductive material of the stack exposed within the openings. 10. The method of claim 1 , wherein the control unit includes string driver circuitry. 11. A method of forming a memory device, comprising: forming a stack structure including an alternating sequence of insulative structures and conductive structures arranged in tiers, the stack structure comprising: a stair step structure having steps comprising ends of the tiers; an additional stair step structure having additional steps comprising additional ends of the tiers; and a landing region interposed between the stair step structure and the additional stair step structure; forming conductive contact structures within the landing region of the stack structure and extending completely through the stack structure, the conductive contact structures in electrical communication with string driver circuitry underlying the stack structure; and electrically coupling the conductive contact structures to the conductive structures of the tiers of the stack structure by way of routing structures extending from the conductive contact structures to one or more of the steps of the stair step structure and the additional steps of the additional stair step structure. 12. The method of claim 11 , wherein forming a stack structure comprises: forming a preliminary stack structure including an alternating sequence of insulative material and sacrificial material; and at least partially replacing the sacrificial material of the preliminary stack structure with conductive material to form the stack structure, the conductive structures of the stack structure comprising the conductive material, and the insulative structures of the stack structure comprising remaining portions of the insulative material of the preliminary stack structure. 13. The method of claim 12 , wherein at least partially replacing the sacrificial material of the preliminary stack structure with conductive material comprises only replacing a portion of the sacrificial material with the conductive material, the conductive structures of the tiers the stack structure laterally adjacent remaining portions of the sacrificial material. 14. The method of claim 13 , wherein only replacing a portion of the sacrificial material with the conductive material comprises forming portions of the conductive structures of the tiers of the stack structure within the landing region to outwardly laterally surround the remaining portions of the sacrificial material within the landing region. 15. The method of claim 14 , wherein forming conductive contact structures within the landing region of the stack structure comprises forming the conductive contact structures within lateral areas of the remaining portions of the sacrificial material. 16. The method of claim 12 , wherein at least partially replacing the sacrificial material of the preliminary stack structure with the conductive material comprises: forming slots extending through the preliminary stack structure; selectively etching portions of the sacrificial material exposed by the slots to laterally recess the sacrificial material relative to the insulative material; and depositing the conductive material in recesses formed by selectively etching portions of the sacrificial material. 17. The method of claim 16 , further comprising: removing portions of the conductive material within lateral areas of the slots to form additional slots; and substantially filling the additional slots with at least one dielectric material. 18. The method of claim 11 , further comprising forming the stack structure to further comprise: a further stair step structure opposing the stair step structure and having further steps comprising further ends of the tiers; an other stair step structure opposing the additional stair step structure and having other steps comprising other ends of the tiers; and an additional landing region laterally adjacent the further stair step structure, the stair step structure and the further stair step structure each interposed between the landing region and the additional landing region; and a further landing region laterally adjacent the other stair step structure, the additional stair step structure and the other stair step structure each interposed between the landing region and the further landing region. 19. A method of forming a memory device, comprising: forming a stack structure including tiers each including an insulative structure and a conductive structure vertically adjacent the insulative structure, the stack structure comprising: a first stadium structure comprising first opposing stair step structures each having steps comprising ends of the tiers; a second stadium structure comprising second opposing stair step structures each having additional steps comprising additional ends of the tiers; and a crest region laterally interposed between

Assignees

Inventors

Classifications

  • using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

  • by filling conductive material into holes, grooves or trenches · CPC title

  • Vias, e.g. via plugs · CPC title

  • H10W20/435Primary

    Cross-sectional shapes or dispositions of interconnections · CPC title

  • Electricity · mapped topic

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What does patent US11430734B2 cover?
Conductive structures include stair step structures positioned along a length of the conductive structure and at least one landing comprising at least one via extending through the conductive structure. The at least one landing is positioned between a first stair step structure of the stair step structures and a second stair step structure of the stair step structures. Devices may include such …
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification H10W20/435. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 30 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).