Display panel and method of manufacturing thereof

Patent metadata

Field	Value
Publication number	US-11430705-B2
Application number	US-202016845485-A
Country	US
Kind code	B2
Filing date	Apr 10, 2020
Priority date	Apr 10, 2019
Publication date	Aug 30, 2022
Grant date	Aug 30, 2022

Abstract

A display panel and a method of manufacturing thereof are provided. The method of manufacturing a display panel includes forming a driving circuit on a substrate; forming an electrode, including a first area and a second area therewith, on the driving circuit; mounting a first micro Light Emitting Diode (LED), for forming a sub pixel, on the first area; forming an absorption layer on the second area, the absorption layer configured to absorb an external light; removing, based on the sub pixel being defective, the absorption layer; and mounting a second micro LED on the second area after removing the absorption layer.

First claim

What is claimed is:

1. A method of manufacturing a display panel including a plurality of pixels, each pixel of the plurality of pixels including a plurality of sub pixels, the method comprising:
forming a driving circuit on a substrate;
forming a plurality of electrodes that correspond to the plurality of sub pixels of a pixel of the plurality of pixels, respectively, on the driving circuit, wherein each electrode of the plurality of electrodes includes a first area and a second area separated from the first area;
mounting a plurality of first micro Light Emitting Diodes (LEDs), for forming a respective sub pixels of the pixel, on the first area of each of the plurality of electrodes so that each of the plurality of first micro LEDs is separated from the second area of each of the plurality of electrodes;
forming an absorption layer on the second area of each of the plurality of electrodes, the absorption layer configured to absorb an external light;
identifying a defective sub pixel among the plurality of sub pixels of the pixel;
removing, based on the defective sub pixel being identified, a portion of the absorption layer corresponding to a region of the second area of one of the plurality of electrodes that corresponds to the defective sub pixel;
mounting, after removing the absorption layer, a second micro LED on the second area of an electrode of the plurality of electrodes that corresponds to the defective sub pixel;
removing a first micro LED from among the plurality of first micro LEDs that forms the defective sub pixel; and
forming the absorption layer on the first area exposed due to removal of the first micro LED of the defective sub pixel.

2. The method of claim 1 ,
wherein the second micro LED is configured to emit a light of a same color as light in which the first micro LED is configured to emit when the first micro LED is in a state to form a sub pixel without defect.

3. The method of claim 1 ,
wherein a size of the one of the plurality of electrodes is bigger than a size of the first micro LED, and
the first area and the second area of the one of the plurality of electrodes are electronically connected with each other.

4. The method of claim 1 ,
wherein the one of the plurality of electrodes includes a first electrode and a second electrode, and
the first electrode and the second electrode are both arranged across the first area and the second area.

5. The method of claim 4 ,
wherein the first electrode is a common electrode commonly connected with two of the plurality of first micro LEDs for forming the pixel, and
the second electrode is arranged adjacent to the first electrode.

6. The method of claim 4 ,
wherein the first electrode and the second electrode are arranged in parallel.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Han Seungryong
• Park Sangmoo
• Kim Hyunsun

Classifications

• H10W90/00

  Package configurations · CPC title

• H10P74/232 Primary

  comprising connection or disconnection of parts of a device in response to a measurement · CPC title

• H10H20/83

  Electrodes · CPC title

• H10H20/01

  Manufacture or treatment · CPC title

• H10H29/142 Primary

  Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title