Technologies for paravirtual network device queue and memory management

US11412059B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11412059-B2
Application numberUS-201616328865-A
CountryUS
Kind codeB2
Filing dateSep 30, 2016
Priority dateSep 30, 2016
Publication dateAug 9, 2022
Grant dateAug 9, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Technologies for managing paravirtual network device queue and memory of a network computing device that includes multi-core processor, a multi-layer cache, a host, and a plurality of virtual machine instances. The host is assigned a processor core of the processor and may be configured to copy a received network packet to a last level cache of the multi-layer cache and determine one or more virtual machine instances configured to process the received network packet. Each virtual machine instance has been assigned a processor core of the processor and has been allocated a first level cache of the multi-level cache memory associated with the respective processor core. The host is additionally configured to inject an interrupt into each processor core of the determined virtual machine (s) which indicates to the virtual machine instance (s) that the received network packet is available to be processed.

First claim

Opening claim text (preview).

The invention claimed is: 1. A network computing device to manage paravirtual network device queues and memory of the network computing device, the network computing device comprising: network traffic ingress/egress manager circuitry to: copy at least a portion of a network packet received by the network computing device to a last level cache of a multi-level cache memory allocated to a processor of the network computing device, the processor including a plurality of processor cores, one of the processor cores assigned to a host of the network computing device, one or more of the other processor cores assigned to a corresponding virtual machine instance of a plurality of virtual machine instances executing on the network computing device; determine a first virtual machine instance of the plurality of virtual machine instances that is to process the portion of the network packet, the multi-level cache memory including a first level cache of the multi-level cache memory allocated to a corresponding processor core of the first virtual machine instance; and inject, subsequent to having determined the first virtual machine instance, an interrupt into the processor core assigned the first virtual machine instance, the interrupt to indicate to the first virtual machine instance that the network packet is available to be processed; and cache manager circuitry to copy the portion of the network packet from the last level cache to the first level cache allocated to the corresponding processor core assigned to the first virtual machine instance. 2. The network computing device of claim 1 , wherein the host includes one of a host operating system or a host hypervisor. 3. The network computing device of claim 1 , wherein the last level cache includes a portion of the multi-level cache memory shared between the host and the first virtual machine instance. 4. The network computing device of claim 1 , wherein the cache manager circuitry is to copy the portion of the network packet in response to a fetch command. 5. The network computing device of claim 1 , wherein the cache manager circuitry is to copy the portion of the network packet to a descriptor ring, the descriptor ring shared between ones of the plurality of processor cores. 6. A network computing device to manage paravirtual network device queues and memory of the network computing device, the network computing device comprising: network traffic ingress/egress manager circuitry to: copy at least a portion of a network packet received by the network computing device to a last level cache of a multi-level cache memory allocated to a processor of the network computing device, the processor including a plurality of processor cores, one of the processor cores assigned to a host of the network computing device, one or more of the other processor cores assigned to a corresponding virtual machine instance of a plurality of virtual machine instances executing on the network computing device; and determine a first virtual machine instance of the plurality of virtual machine instances that is to process the portion of the network packet, the multi-level cache memory including a first level cache of the multi-level cache memory allocated to a corresponding processor core of the first virtual machine instance; cache manager circuitry to copy the portion of the network packet from the last level cache to the first level cache allocated to the corresponding processor core assigned to the first virtual machine instance; and instructions to cause the computing device to: allocate, prior to instantiation of the first virtual machine instance, one or more system resources to the first virtual machine instance to be instantiated; modify a guest operating system to include code usable to interact with a paravirtualization hypervisor of the host; install the modified guest operating system onto the paravirtualization hypervisor; place a plurality of descriptors of a memory buffer into a descriptor ring, ones of the descriptors to indicate a location in the memory allocated to the host in which the memory buffer resides; and share the memory buffer between the host and the first virtual machine instance. 7. The network computing device of claim 6 , wherein to allocate the one or more system resources includes to allocate an amount of the memory buffer and at least one of the processor cores. 8. A computer-readable storage device or media disc comprising a plurality of instructions stored thereon that, in response to being executed, cause a network computing device to at least: copy, by a host of the network computing device, at least a portion of a network packet received by the network computing device to a last level cache of a multi-level cache memory allocated to a processor of the network computing device, the processor including a plurality of processor cores, one of the processor cores assigned to the host, one or more of the other processor cores assigned to a corresponding virtual machine instance of a plurality of virtual machine instances executing on the network computing device; determine, by the host, a first virtual machine instance of the plurality of virtual machine instances that is to process the portion of the network packet, the multi-level cache memory additionally including a first level cache of the multi-level cache memory allocated to a corresponding processor core of the first virtual machine instance; inject, subsequent to having determined the first virtual machine instance, an interrupt into the processor core assigned the first virtual machine instance, the interrupt to indicate to the first virtual machine instance that the network packet is available to be processed; and copy, by the host, the portion of the network packet from the last level cache to the first level cache allocated to the corresponding processor core assigned to the first virtual machine instance. 9. The computer-readable storage device or media disc of claim 8 , wherein the host includes one of a host operating system or a host hypervisor. 10. The computer-readable storage device or media disc of claim 8 , wherein the last level cache includes a portion of the multi-level cache memory shared between the host and the first virtual machine instance. 11. The computer-readable storage device or media disc of claim 8 , wherein the plurality of instructions further cause the network computing device to determine, subsequent to having injected the interrupt, whether a fetch command has been received from the first virtual machine instance, and copy the portion of the network packet in response to the fetch command. 12. The computer-readable storage device or media disc of claim 8 , wherein the plurality of instructions further cause the network computing device to copy the portion of the network packet to a descriptor ring, the descriptor ring shared between ones of the plurality of processor cores. 13. A storage device or media disc comprising a plurality of instructions stored thereon that, in response to being executed, cause a network computing device to at least: copy, by a host of the network computing device, at least a portion of a network packet received by the network computing device to a last level cache of a multi-level cache memory allocated to a processor of the network computing device, the processor including a plurality of processor cores, one of the processor cores assigned to the host, one or more of the other processor cores assigned to a corresponding virtual machine instance of a plurality of virtual machine instances executing on the network computing device; determine, by the host, a first virtual machine

Assignees

Inventors

Classifications

  • Buffering arrangements · CPC title

  • in which an application is distributed across nodes in the network (software deployment G06F8/60; multiprogramming arrangements G06F9/46) · CPC title

  • Storing data temporarily at an intermediate stage, e.g. caching · CPC title

  • with two or more cache hierarchy levels (with multilevel cache hierarchies G06F12/0811) · CPC title

  • Memory management, e.g. access or allocation · CPC title

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Frequently asked questions

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What does patent US11412059B2 cover?
Technologies for managing paravirtual network device queue and memory of a network computing device that includes multi-core processor, a multi-layer cache, a host, and a plurality of virtual machine instances. The host is assigned a processor core of the processor and may be configured to copy a received network packet to a last level cache of the multi-layer cache and determine one or more vi…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F12/0897. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 09 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).