Data storage device and non-volatile memory control method

Patent metadata

Field	Value
Publication number	US-11397669-B2
Application number	US-202017025044-A
Country	US
Kind code	B2
Filing date	Sep 18, 2020
Priority date	Nov 29, 2019
Publication date	Jul 26, 2022
Grant date	Jul 26, 2022

Abstract

The background update of a host-to-device mapping (H2F) table designed for an efficient space trimming technology of data storage devices is shown. A controller handles a target bit in a trimming bitmap (TBM) and updates the H2F table to store information regarding the trimming status of a trimming target which has a specific length and is marked by the target bit. The controller programs the starting logical address and trimming length of the trimming target into a cache area of the temporary storage device. After the target bit handling, the controller flushes a sub-table of the trimming bitmap that manages the target bit from the cache area into the non-volatile memory.

First claim

What is claimed is:

1. A data storage device, comprising:
a non-volatile memory; and
a controller and a temporary storage device which are coupled to the non-volatile memory, wherein the controller is configured to handle a target bit within a trimming bitmap, the trimming bitmap uses bits to indicate asynchronous parts of a host-to-device mapping table, the asynchronous parts include old mapping information which has not been updated in response to a trimming command yet, and, when handling the target bit, the controller updates the host-to-device mapping table to store information regarding trimming status of a trimming target, wherein the trimming target has a specific length and is marked by the target bit,
wherein:
the controller programs starting logical address and trimming length of the trimming target into a cache area of the temporary storage device;
the target bit is managed in a sub-table of the trimming bitmap; and
after the target bit handling, the controller flushes the sub-table of the trimming bitmap from the cache area into the non-volatile memory.

2. The data storage device as claimed in claim 1 , wherein:
the controller updates the host-to-device mapping table to record dummy mapping information corresponding to the trimming target.

3. The data storage device as claimed in claim 2 , wherein:
the controller manages a trimming information flag bitmap on the temporary storage device corresponding to a plurality of cache entries allocated in the cache area which marks a cache entry storing the starting logical address and the trimming length of the trimming target and a cache entry storing the sub-table of the trimming bitmap; and
when flushing data from the cache area to the non-volatile memory, the controller further flushes the trimming information flag bitmap to the non-volatile memory.

4. The data storage device as claimed in claim 3 , wherein:
the controller further manages a storage information table on the temporary storage device corresponding to the plurality of cache entries in the cache area;
the controller updates the storage information table to store a logical address when the corresponding cache entry stores user data;
the controller updates the storage information table to store a target trimming bitmap sub-table number when the corresponding cache entry stores the sub-table of the trimming bitmap; and
the controller updates the storage information table to record medium-length trimming code for interpreting the cache entry storing the starting logical address and the trimming length of the trimming target; and
when flushing data from the cache area to the non-volatile memory, the controller further flushes the storage information table to the non-volatile memory.

5. The data storage device as claimed in claim 4 , wherein:
the starting logical address and the trimming length of the trimming target are combined with dummy cache data to occupy half of the corresponding cache entry;
a size of the sub-table of the trimming bitmap is half of the corresponding cache entry;
when the starting logical address and the trimming length of the trimming target is stored in a first half of a target cache entry, the corresponding medium-length trimming code is stored in the storage information table as a first half of storage information corresponding to the target cache entry; and
when a second half of the target cache entry stores the sub-table of the trimming bitmap, the target trimming bitmap sub-table number is stored in the storage information table as a second half of the storage information corresponding to the target cache entry.

6. The data storage device as claimed in claim 4 , wherein:
the controller iterates the setting of the target bit for a traversal of all asserted bits of the trimming bitmap and thereby deasserts all asserted bits of the trimming bitmap and updates the host-to-device mapping table accordingly.

7. The data storage device as claimed in claim 6 , wherein:
the controller iterates the setting of the target bit for the traversal of all asserted bits of the trimming bitmap during free intervals between responding to commands from a host.

8. The data storage device as claimed in claim 4 , wherein:
in response to a write command issued by a host, the controller checks the trimming bitmap;
when a logical address range requested by the write command is marked as trimmed in the trimming bitmap, the controller sets the target bit based on the logical address range to handle the target bit and update the host-to-device mapping table to store information regarding the trimming status of the trimming target marked by the target bit, programs write data of the write command to the cache area, and updates the host-to-device mapping table to map the logical address range to the write data stored in the cache area.

9. The data storage device as claimed in claim 1 , wherein:
the host-to-device mapping table includes a plurality of mapping sub-tables, and each mapping sub-table records mapping data of a logical address range of the specific length; and
the controller downloads a target mapping sub-table related to the trimming target from the non-volatile memory to the temporary storage device, and completely revises the target mapping sub-table by programming dummy mapping information.

10. The data storage device as claimed in claim 1 , wherein:
when handling the target bit and updating the host-to-device mapping table to store information regarding the trimming status of the trimming target marked by the target bit, the controller updates a valid page count table that records valid page counts for all pages.

11. A method for controlling a non-volatile memory, comprising:
handling a target bit within a trimming bitmap, wherein the trimming bitmap uses bits to indicate asynchronous parts of a host-to-device mapping table, and the asynchronous parts include old mapping information which has not been updated in response to a trimming command yet;
updating the host-to-device mapping table when handling the target bit, to store information regarding trimming status of a trimming target, wherein the trimming target has a specific length and is marked by the target bit,
programming starting logical address and trimming length of the trimming target into a cache area of a temporary storage device; and
after the target bit handling, flushing a sub-table of the trimming bitmap from the cache area into the non-volatile memory, wherein the target bit is managed in the sub-table of the trimming bitmap.

12. The method as claimed in claim 11 , further comprising:
updating the host-to-device mapping table to record dummy mapping information corresponding to the trimming target.

13. The method as claimed in claim 12 , further comprising:
managing a trimming information flag bitmap on the temporary storage device corresponding to a plurality of cache entries allocated in the cache area, wherein the trimming information flag bitmap marks a cache entry storing the starting logical address and the trimming length of the trimming target and a cache entry storing the sub-table of the trimming bitmap; and
when flushing data from the cache area to the non-volatile memory, further flushing the trimming information flag bitmap to the non-volatile memory.

14. The method as claimed in claim 13 , further comprising:
managing a storage information table on the temporary storage device corresponding to the plurality of cache entries in the cache area;
updating the storage information table to store a logical address when the corresponding cache entry stores user data;
updating the storage

Assignees

• Silicon Motion Inc

Inventors

• Chung Yu-Hsiang

Classifications

• G06F3/0652

  Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket · CPC title

• G06F12/0866

  for peripheral storage systems, e.g. disk cache · CPC title

• G06F12/0873

  Mapping of cache memory to specific storage devices or parts thereof · CPC title

• G06F2212/7203

  Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks · CPC title

• G06F12/0891

  using clearing, invalidating or resetting means · CPC title