Low delay, low power and high linearity class-D modulation loop

US11368132B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11368132-B2
Application numberUS-202017119978-A
CountryUS
Kind codeB2
Filing dateDec 11, 2020
Priority dateDec 26, 2019
Publication dateJun 21, 2022
Grant dateJun 21, 2022

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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Systems and methods include a circuit having a plurality of integrator circuits arranged in series and configured to receive an input signal at a first of the plurality of integrators and generate an output signal at a last of the plurality of integrators, a filter arranged to receive a feedback signal comprising the output signal and generate a filtered feedback signal, which is applied to the input signal before input to the first of the plurality of integrators, and a feedback signal path configured to receive the feedback signal and apply the feedback signal to an input of a second of the plurality of integrators. The circuit may include a class-D amplifier and/or a delta-sigma modulator. The input signal may include an analog audio signal that is amplifier to drive an audio speaker.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: receiving an audio input signal at an input of an audio amplifier circuit comprising a series of integrators; processing the audio input signal through the series of integrators; generating an audio output signal using a quantizer arranged to receive an output from the last integrator in the series; feeding back the audio output signal as a feedback signal which is applied to a respective input of each of the integrators in the series; and filtering the feedback signal at the respective input of the first integrator in the series and not at the respective inputs of any of the remaining integrators in the series. 2. The method of claim 1 , further comprising feeding an output of the last integrator in the series to a comparator which generates the audio output signal. 3. The method of claim 1 , wherein the first integrator in the series receives the audio input signal and generates a first output which is provided as the respective input to the second integrator in the series. 4. The method of claim 1 , wherein filtering the feedback signal at the respective input of the first integrator in the series comprises applying the feedback signal to a digital to analog converter. 5. The method of claim 4 , wherein an output of the digital to analog converter is subtracted from the respective input to the second integrator in the series and a respective input to a comparator which generates the audio output signal. 6. The method of claim 5 , wherein the digital to analog converter is a 1-bit digital to analog converter. 7. The method of claim 1 , wherein the audio amplifier circuit comprises a delta sigma modulator. 8. A circuit comprising: a series of integrators configured to receive an input signal at the first integrator in the series and generate an integrated signal from the last integrator in the series; a quantizer arranged to receive the integrated signal and generate an output signal; and a feedback signal path configured to: receive a feedback signal comprising the output signal; filter the feedback signal at a respective input of the first integrator in the series and not at respective inputs of any of the remaining integrators in the series; and apply the feedback signal to the respective input of the second integrator in the series. 9. The circuit of claim 8 , wherein the circuit is a class-D amplifier. 10. The circuit of claim 8 , wherein the circuit is a delta-sigma modulator. 11. The circuit of claim 8 , wherein the input signal is an analog audio signal. 12. The circuit of claim 8 , wherein the quantizer is configured to receive an output generated from the last integrator in the series and generate an amplified audio output signal. 13. The circuit of claim 8 , wherein the first integrator in the series is configured for higher linearity and/or lower noise than other integrators in the series. 14. A system comprising: an audio amplifier configured to receive an audio input signal and output an amplified audio signal to a loudspeaker, the audio amplifier comprising: a series of integrators configured to receive the audio input signal and generate the amplified audio signal; and a feedback signal path configured to receive the amplified audio signal and filter the amplified audio signal at a respective input of the first integrator in the series and not at respective inputs of any of the remaining integrators in the series. 15. The system of claim 14 , wherein the audio amplifier further comprises a quantizer configured to receive an output generated from the last integrator in the series and generate the amplified audio signal. 16. The system of claim 14 , wherein the first integrator in the series is configured for higher linearity and/or lower noise than other integrators in the series. 17. The system of claim 14 , wherein the feedback signal path is further configured to apply an unfiltered feedback signal to the respective input of the second integrator in the series and/or one or more subsequent integrators in the series. 18. The system of claim 17 , wherein applying the unfiltered feedback signal to the respective input of the second integrator in the series and/or one or more subsequent integrators in the series comprises subtracting the unfiltered feedback signal from an output of an immediately preceding integrator in the series. 19. The system of claim 18 , further comprising a plurality of subtractor components, each of the subtractor components arranged to receive an output from one of the integrators in the series and the unfiltered feedback signal. 20. The system of claim 14 , further comprising a digital signal processor configured to generate the audio input signal.

Assignees

Inventors

Classifications

  • Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators (of digital delta-sigma modulators H03M7/3004) · CPC title

  • H03F3/217Primary

    Class D power amplifiers; Switching amplifiers · CPC title

  • with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage · CPC title

  • of non-linear distortion, e.g. instability (avoiding instability by structural design H03M3/44) · CPC title

  • Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title

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What does patent US11368132B2 cover?
Systems and methods include a circuit having a plurality of integrator circuits arranged in series and configured to receive an input signal at a first of the plurality of integrators and generate an output signal at a last of the plurality of integrators, a filter arranged to receive a feedback signal comprising the output signal and generate a filtered feedback signal, which is applied to the…
Who is the assignee on this patent?
Synaptics Inc
What technology area does this patent fall under?
Primary CPC classification H03F3/217. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 21 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).