Methods to reduce current spikes in capacitive DC-DC converters employing gain-hopping

Patent metadata

Field	Value
Publication number	US-9906122-B2
Application number	US-201313856393-A
Country	US
Kind code	B2
Filing date	Apr 3, 2013
Priority date	Apr 3, 2012
Publication date	Feb 27, 2018
Grant date	Feb 27, 2018

Abstract

A capacitive voltage converter providing multiple gain modes comprising a switched capacitor array having a voltage input and a voltage output. A skip gating control coupled to the switched capacitor array and configured to control a switch resistance value of the switched capacitor array, and to control a switching sequence of the switched capacitor array. An override control coupled to the skip gating control and the switched capacitor array, the override control configured to detect transitions in a gain mode and to modify the switch resistance value of the switched capacitor array and the switching sequence of the switched capacitor array for a finite amount of time following the gain mode transition.

First claim

What is claimed is:

1. A capacitive voltage converter providing multiple gain modes comprising:
a switched capacitor array having a voltage input and a voltage output;
a skip gating control coupled to the switched capacitor array and configured to control a switch resistance value of the switched capacitor array, and to control a switching sequence of the switched capacitor array;
an override control coupled to the skip gating control and the switched capacitor array, the override control configured to detect transitions in a gain mode and to modify the switch resistance value of the switched capacitor array and the switching sequence of the switched capacitor array for a finite amount of time following the gain mode transition;
a switch resistance control having a target voltage value input and an output selected as a function of the target voltage value input to control the switch resistance value of the switched capacitor array; and
gain selection logic coupled to the skip gating control and the switch resistance control, the gain selection logic configured to provide a gain value to the skip gating control and the switch resistance control.

2. The capacitive voltage converter of claim 1 wherein the switch resistance control further comprises a resistance look-up table.

3. The capacitive voltage converter of claim 1 wherein the switch resistance control has an input voltage value input and wherein the output is further selected to control the switch resistance value of the switched capacitor array as a function of the input voltage value input.

4. The capacitive voltage converter of claim 1 wherein the gain selection logic comprises a voltage value input and is configured to generate the gain value as a function of the voltage value input.

5. The capacitive voltage converter of claim 1 wherein the skip gating control comprises a voltage value input and is configured to control the capacitance value of the switched capacitor array as a function of the voltage value input.

6. The capacitive voltage converter of claim 3 wherein the switch resistance control further selects the output as a function of the gain value, and wherein the switch resistance value is scalable based on an expected load current setting.

7. The capacitive voltage converter of claim 1 wherein the switched capacitor array is configured to operate in two or more gain regions.

8. The capacitive voltage converter of claim 1 wherein the switched capacitor array is configured to provide two or more selectable resistance values for at least one switch in the switched capacitor array.

9. A method for controlling a capacitive voltage converter comprising:
receiving an input voltage;
selecting a gain region for a switched capacitor array using gain selection logic, wherein the gain region is selected as a function of the input voltage and an expected output voltage and provided to a skip gating control and a switch resistance control;
selecting a skip gating control setting for the switched capacitor array as a function of the gain region;
selecting a first resistance setting of the switched capacitor array using the switch resistance control, wherein the first resistance setting is selected as a function of the input voltage and a target voltage value input to control a switch resistance value of the switched capacitor array;
selecting a switching sequence of the switched capacitor array;
detecting a transition in a gain mode; and
modifying the first resistance setting and the switching sequence of the switched capacitor array for a predetermined amount of time following the gain mode transition.

10. The method of claim 9 wherein the expected output voltage is a function of an output voltage of the switched capacitor array.

11. The method of claim 9 further comprising selecting the gain region for the switched capacitor array as a function of a target voltage for an output of the switched capacitor array.

12. The method of claim 9 further comprising selecting the skip gating control setting for the switched capacitor array as a function of an output voltage of the switched capacitor array.

13. The method of claim 9 further comprising selecting the skip gating control setting for the switched capacitor array as a function of a target voltage for an output of the switched capacitor array.

14. The method of claim 9 wherein the switch resistance control comprises a resistance look-up table, the method further comprising using the resistance look-up table to select the resistance setting of the switched capacitor array.

15. The method of claim 9 wherein the resistance setting of the switched capacitor array is further selected as a function of a gain value for the switched capacitor array.

Assignees

• Synaptics Inc

Inventors

• Crespi Lorenzo
• Murukutla Lakshmi

Classifications

• H02M3/06 Primary

  using resistors or capacitors, e.g. potential divider · CPC title

• H02M3/07 Primary

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title