Error amplifying and frequency compensating circuits and methods

Patent metadata

Field	Value
Publication number	US-10084369-B2
Application number	US-201715853602-A
Country	US
Kind code	B2
Filing date	Dec 22, 2017
Priority date	Dec 22, 2016
Publication date	Sep 25, 2018
Grant date	Sep 25, 2018

Abstract

Methods and systems for implementing a closed loop DC-DC converter utilize a compensator to stabilize the output voltage of the DC-DC converter while improving the loop gain in the band of interest. A compensator may be implemented by an operational amplifier and a feedback circuit. The operational amplifier may be configured to receive a fraction of sensed output voltage at the non-inverting terminal and compare the sensed output voltage with the voltage received at the inverting terminal to generate an error signal which is used to determine the duty cycle of a pulse-width modulated signal.

First claim

What is claimed is:

1. A compensation circuit for a dc-dc converter, the compensation circuit comprising:
an amplifier comprising an inverting input coupled to a reference voltage, a non-inverting input coupled to receive a fraction of an output voltage from the dc-dc converter, and an output, wherein the amplifier is operable to generate a first control signal in response to the non-inverting input and inverting input;
a feedback circuit coupled between the amplifier output and the inverting input; and
a subtractor coupled to the reference voltage and the output of the amplifier, wherein the subtractor is operable to receive the first control signal and generate a second control signal, wherein the second control signal is generated by determining a difference of the reference voltage and the first control signal;
wherein the second control signal modulated a duty cycle of the dc-dc converter.

2. The compensation circuit of claim 1 , wherein the feedback circuit further comprises a feedback capacitor connected in parallel with a feedback resistor.

3. The compensation circuit of claim 1 , further comprising a reference voltage source, wherein the reference voltage source is coupled to the inverting input of the amplifier.

4. The compensation circuit of claim 3 wherein the reference voltage is a fixed voltage that controls dc-dc converter output level.

5. The compensation circuit of claim 3 , further comprising passive components coupled between the reference voltage source and the inverting input of the amplifier.

6. The compensation circuit of claim 3 wherein the feedback circuit comprises a low-pass filter having a capacitor coupled between the output and the reference voltage source.

7. The compensation circuit of claim 1 further comprising a resistor divider operable to receive the output voltage from the dc-dc converter and generate the fraction of the output voltage.

8. The compensation circuit of claim 1 further comprising a pulse width modulator coupled to the output of the subtractor and operable to regulate the output voltage based on the second control signal.

9. The compensation circuit of claim 8 wherein the pulse width modulator is further operable to generate binary signals based on the second control signal.

10. The compensation circuit of claim 9 , wherein a duty cycle of the binary signals is controlled by the control signal.

11. The compensation circuit of claim 10 further comprising:
a switch network having a first switching device connected between an inductor and a reference node and a second switching device connected between the inductor and an output capacitor;
wherein the first and second switching devices alternate between a conducting state and a blocking state in response to the binary signals.

12. A method for stabilizing a dc-dc converter, the method comprising:
receiving a fraction of an output voltage from the dc-dc converter at a non-inverting input of an amplifier;
receiving a feedback voltage and a portion of a reference voltage at an inverting input of the amplifier;
generating an output signal from the amplifier in response to the fraction of the output voltage from the dc-dc converter; and
generating a control signal to modulate a duty cycle of the dc-dc converter via a subtractor based on a voltage difference between the reference voltage and the output signal generated by the amplifier.

13. The method of claim 12 , wherein the fraction of the output voltage is generated via a voltage divider.

14. The method of claim 13 , further comprising:
generating a pulse-width modulated signal based on the control signal; and
regulating the output voltage of the dc-dc convertor using the pulse width modulated signal.

15. The method of claim 14 further comprising:
controlling a first switching device and a second switching device using binary signals generated by a pulse width modulator.

16. The method of claim 15 , wherein the second switching device conducts current when the first switching device is in a blocking state.

17. A DC-DC boost converter comprising:
a switch network having a first switching device connected between an inductor and a reference node and a second switching device connected between the inductor and an output capacitor, wherein the first and second switching devices alternate between a conducting state and a blocking state in response to a first binary signal and a second binary signal, respectively;
an output low-pass filter having the output capacitor connected between an output node and the reference node;
a compensation network operable to generate an output signal in correspondence with an output voltage sensed at the output node, wherein the compensation network comprises an amplifier receiving a fraction of the output voltage at a non-inverting terminal of the amplifier and a feedback circuit connected between an output node of the amplifier and a inverting terminal of the amplifier; and
a modulator configured to generate the first and the second binary signals based on a control signal.

18. The dc-dc converter of claim 17 , wherein the second switching device conducts current when the first switching device is in the blocking state.

19. The dc-dc converter of claim 17 , wherein the first switching device is constructed using at least one of a diode, a metal oxide semiconductor field effect transistor (MOSFET), an insulated-gate bipolar transistor (IGBT), a bipolar junction transistor (BJT), and a thyristor.

Assignees

• Synaptics Inc

Inventors

• Shen Dan
• Crespi Lorenzo

Classifications

• H02M1/143 Primary

  using compensating arrangements (for reducing noise from the supply in transmission systems H04B15/005) · CPC title

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H02M3/157

  with digital control · CPC title

• H02M3/156 Primary

  with automatic control of output voltage or current, e.g. switching regulators · CPC title