Methods of thinning silicon on epoxy mold compound for radio frequency (RF) applications

US11355358B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11355358-B2
Application numberUS-201916579723-A
CountryUS
Kind codeB2
Filing dateSep 23, 2019
Priority dateSep 24, 2018
Publication dateJun 7, 2022
Grant dateJun 7, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of methods for processing a semiconductor substrate are described herein. In some embodiments, a method of processing a semiconductor substrate includes removing material from a backside of a reconstituted substrate having a plurality of dies to expose at least one die of the plurality of dies; etching the backside of the reconstituted substrate to remove material from the exposed at least one die; and depositing a first layer of material on the backside of the reconstituted substrate and the exposed at least one die.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of processing a semiconductor substrate, comprising: removing material from a backside of a reconstituted substrate having a plurality of dies to expose at least one die of the plurality of dies; etching the backside of the reconstituted substrate to remove material from the exposed at least one die; and depositing a first layer of material on the backside of the reconstituted substrate and the exposed at least one die, wherein the first layer of material comprises at least one of a passivation layer, a dielectric layer, a polymer layer, an epoxy layer, or an organic layer. 2. The method of claim 1 , further comprising: depositing a second layer of material on the backside prior to etching the backside, wherein the second layer of material is a patterned masking layer that exposes the at least one die while covering at least one additional die of the plurality of dies. 3. The method of claim 1 , wherein removing material from the exposed at least one die comprises etching one of the at least one die to a final thickness of less than about 0.1 micrometers. 4. The method of claim 1 , wherein the first layer of material is deposited via spin coating, spraying, or chemical vapor deposition. 5. The method of claim 1 , wherein the plurality of dies include a first die and a second die, wherein the first die has a thickness different than a thickness of the second die. 6. The method of claim 1 , wherein etching comprises a wet or dry etch process. 7. The method of claim 1 , wherein the first layer of material is a polymer or epoxy layer. 8. The method of claim 1 , wherein removing material from the backside of the reconstituted substrate comprises backgrinding or planarizing. 9. The method of claim 1 , wherein the first layer has a uniform thickness. 10. A method of processing a semiconductor substrate, comprising: overmolding a non-active side of a first die and a second die to form a reconstituted substrate having a first side and a second side, wherein an active side of the first die and the second die face the second side; chemical-mechanical planarizing the first side of the reconstituted substrate to expose at least one of the first die and the second die; etching the first side of the reconstituted substrate to reduce a thickness of at least one of the first die and the second die, wherein a final thickness of the first die and the second die is less than about 5 micrometers; and depositing a first layer of material on the first side of the reconstituted substrate and the etched at least one of the first die and the second die, wherein the first layer of material comprises an organic layer. 11. The method of claim 10 , further comprising: forming a redistribution layer on the reconstituted substrate prior to overmolding. 12. The method of claim 10 , wherein the first die is thicker than the second die. 13. The method of claim 10 , wherein the first layer is deposited conformally atop the first side of the reconstituted substrate. 14. A non-transitory computer readable medium for storing computer instructions that, when executed by at least one processor causes the at least one processor to perform a method comprising: removing material from a backside of a reconstituted substrate having a plurality of dies to expose at least one die of the plurality of dies; etching the backside of the reconstituted substrate to remove material from the exposed at least one die; and depositing a first layer of material on the backside of the reconstituted substrate and the exposed at least one die, wherein the first layer of material comprises at least one of a passivation layer, a dielectric layer, a polymer layer, an epoxy layer, or an organic layer. 15. The method of claim 14 , wherein removing material from the exposed at least one die comprises etching one of the at least one die to a final thickness of less than about 0.1 micrometers. 16. The method of claim 14 , wherein the first layer of material is a polymer or epoxy layer. 17. The method of claim 14 , wherein the first layer of material has a substantially uniform thickness. 18. The method of claim 14 , further comprising depositing a second layer of material on the backside prior to etching the backside, wherein the second layer of material is a patterned masking layer that exposes the at least one die while covering at least one additional die of the plurality of dies. 19. The method of claim 14 , wherein etching comprises a wet or dry etch process.

Assignees

Inventors

Classifications

  • the encapsulations exposing the passive side of the semiconductor body · CPC title

  • on encapsulations · CPC title

  • Planarisation of organic insulating materials · CPC title

  • Package configurations · CPC title

  • Configurations of laterally-adjacent chips · CPC title

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What does patent US11355358B2 cover?
Embodiments of methods for processing a semiconductor substrate are described herein. In some embodiments, a method of processing a semiconductor substrate includes removing material from a backside of a reconstituted substrate having a plurality of dies to expose at least one die of the plurality of dies; etching the backside of the reconstituted substrate to remove material from the exposed a…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10W74/014. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 07 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).