Electronic device module, method of manufacturing the same and electronic apparatus

Patent metadata

Field	Value
Publication number	US-11347273-B2
Application number	US-202017022568-A
Country	US
Kind code	B2
Filing date	Sep 16, 2020
Priority date	Apr 5, 2018
Publication date	May 31, 2022
Grant date	May 31, 2022

Abstract

An electronic device module includes a substrate, a first component disposed on a first surface of the substrate, a sealing portion disposed on the first surface of the substrate, a second component disposed on the first surface of the substrate and embedded in the sealing portion, and a shielding wall at least partially disposed between the first component and the second component and including a portion having a height, with respect to the first surface of the substrate, that is lower than a height of the sealing portion.

First claim

What is claimed is:

1. An electronic device module comprising:
a substrate;
a sealing portion disposed on a first surface of the substrate;
a first component disposed outside of the sealing portion on the first surface of the substrate;
a second component disposed on the first surface of the substrate and embedded in the sealing portion; and a shielding structure comprising a shielding wall disposed between the first component and the second component, and a shielding layer disposed along a surface of the sealing portion and the shielding wall,
wherein the shielding structure comprises an open-ended structure around the first component and a closed-ended structure around the second component.

2. The electronic device module of claim 1 , wherein the shielding wall comprises three walls.

3. The electronic device module of claim 1 , wherein the shielding wall comprises two walls, and the two walls meet at a corner comprising a radius.

4. The electronic device module of claim 1 , wherein the shielding wall and the first component are configured to have an empty space therebetween.

5. The electronic device module of claim 1 , wherein the sealing portion is disposed between the shielding wall and the second component.

6. The electronic device module of claim 1 , wherein the shielding layer is extended to a side surface of the substrate, and
wherein the substrate comprises a ground electrode, and the ground electrode is exposed to the side surface of the substrate and is in contact with the shielding layer at the side surface of the substrate.

7. The electronic device module of claim 1 , wherein the substrate comprises a ground electrode, and the shielding wall is bonded to the ground electrode.

8. The electronic device module of claim 7 , further comprising a dipole antenna disposed on or in a portion of the substrate that is outside an overlap with the shielding layer.

9. The electronic device module of claim 7 , further comprising a patch antenna disposed on or in a portion of the substrate that overlaps the shielding layer.

10. The electronic device module of claim 1 , wherein the sealing portion comprises a first sealing portion outside of the shielding layer, and a second sealing portion within the shielding layer, and
wherein the first sealing portion is disposed outside of a region in which the second component is disposed.

11. The electronic device module of claim 1 , wherein the substrate comprises a ground electrode, and the shielding layer is electrically connected to the ground electrode.

12. The electronic device module of claim 11 , wherein the shielding layer is connected to an upper end of the shielding wall.

13. The electronic device module of claim 11 , wherein the sealing portion comprises a first sealing portion without the shielding layer, and a second sealing portion provided with the shielding layer and having a thickness, with respect to the first surface of the substrate, that is the same as a thickness of the first sealing portion, and
further comprising an antenna disposed on or in a portion of the substrate that overlaps the first sealing portion.

14. The electronic device module of claim 13 , wherein the shielding layer is extended to the first surface of the substrate between the first sealing portion and the second sealing portion.

15. An apparatus comprising:
a substrate,
a sealing portion disposed on the first surface of the substrate,
a first component disposed on the first surface of the substrate,
a second component disposed on the first surface of the substrate and embedded in the sealing portion,
a shielding structure comprising a shielding wall disposed between the first component and the second component, and a shielding layer disposed along a surface of the sealing portion and the shielding wall, wherein the shielding structure comprises an open-ended structure around the first component and a closed-ended structure around the second component; and
an antenna disposed on a second surface of the substrate opposite the first surface or inside the substrate, wherein the antenna is disposed at a position that overlaps one or more of the first component and the second component.

16. The apparatus of claim 15 , wherein the shielding wall and the first component are configured to have an empty space therebetween.

17. The apparatus of claim 15 , wherein the substrate comprises a ground electrode, and the shielding layer is electrically connected to the ground electrode.

18. The apparatus of claim 15 , wherein a first wall of the shielding wall has a height above the first surface of the substrate that is substantially equal to a height of the sealing portion.

19. The apparatus of claim 18 , wherein a second wall of the shielding wall has a height above the first surface of the substrate that is less than the height of the sealing portion.

20. The apparatus of claim 15 , wherein the antenna comprises one or more of a dipole antenna and a patch antenna and is disposed at a position that overlaps the first component.

21. The apparatus of claim 15 , wherein the antenna comprises a patch antenna and is disposed at a position that overlaps the second component.

22. An electronic device module comprising:
a substrate;
a sealing portion disposed on a first surface of the substrate;
a first component disposed outside of the sealing portion on the first surface of the substrate;
a second component disposed on the first surface of the substrate and embedded in the sealing portion;
a shielding wall disposed between the first component and the second component;
a shielding layer disposed along a surface of the sealing portion;
wherein the sealing portion comprises a first sealing portion without the shielding layer, and a second sealing portion provided with the shielding layer and having a thickness, with respect to the first surface of the substrate, that is substantially the same as a thickness of the first sealing portion, and
further comprising a first antenna disposed on or in a portion of the substrate that overlaps the first sealing portion.

23. The electronic device module of claim 22 , wherein the first sealing portion is disposed along a side of the substrate.

24. The electronic device module of claim 22 , wherein the first antenna comprises a dipole antenna.

25. The electronic device module of claim 22 , further comprising a second antenna disposed on a second surface of the substrate opposite the first surface or inside the substrate, wherein the antenna is disposed at a position that overlaps one or more of the first component and the second component.

26. The electronic device module of claim 25 , wherein the second antenna comprises one or more of a dipole antenna and a patch antenna and is disposed at a position that overlaps the first component.

27. The electronic device module of claim 25 , wherein the second antenna comprises a patch antenna and is disposed at a position that overlaps the second component.

28. The electronic device module of claim 22 , wherein the substrate comprises a ground electrode extending along the entire shape of the shielding wall, and the shielding wall is bonded to the ground electrode.

29. The electronic device module of claim 28 , further comprising an insulating protective layer stacked on top of the ground electrode and comprising an opening to e

Assignees

• Samsung Electro Mech

Inventors

• Hong Suk Youn
• Ryu Jong In
• Hong Seung Hyun
• Kim Jang Hyun

Classifications

• H10W76/60

  Seals · CPC title

• H10W74/129

  forming a chip-scale package [CSP] · CPC title

• H10W42/273

  the arrangements being between laterally adjacent chips, e.g. walls between chips · CPC title

• H10W42/276

  the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title