Semiconductor device and method of manufacture

US11328971B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11328971-B2
Application numberUS-202016939341-A
CountryUS
Kind codeB2
Filing dateJul 27, 2020
Priority dateJan 29, 2016
Publication dateMay 10, 2022
Grant dateMay 10, 2022

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A device includes a substrate with a die over the substrate. A molding compound surrounds the die and includes a structural interface formed along a peripheral region of the molding compound.

First claim

Opening claim text (preview).

What is claimed is: 1. A device comprising: a chip over a substrate; and a molding compound surrounding the chip, the molding compound comprising a first lip in a peripheral region distal the chip, the molding compound comprising a vertical sidewall including an outer sidewall of the first lip, the firt lip comprising a first inner sidewall and a second inner sidewall adjacent the first inner sidewall, the first inner sidewall and the second inner sidewall being outside a periphery of the chip, wherein the first lip is L-shaped in a top-down view, and wherein the first lip is disposed at a corner of the molding compound; and a thermal interface material extending from the first inner sidewall to the second inner sidewall, wherein the molding compound encircles the thermal interface material. 2. The device of claim 1 , wherein a top surface of the thermal interface material is below a top surface of the first lip in a direction perpendicular to a major surface of the substrate. 3. The device of claim 1 , further comprising a lid attached to the chip and the molding compound by way of the thermal interface material. 4. The device of claim 3 , wherein the lid extends from the first inner sidewall to the second inner sidewall of the first lip. 5. The device of claim 1 , wherein the chip is bonded to the substrate by a plurality of connectors, wherein the molding compound extends between adjacent connectors of the plurality of connectors. 6. A device comprising: a substrate; an integrated circuit chip mounted to the substrate; a molding compound encapsulating at least sidewalls of the integrated circuit chip, the molding compound including a lip at an uppermost surface of the molding compound, the lip surrounding a peripheral portion of the integrated circuit chip; an interface material overlying a topmost surface of the molding compound, wherein the interface material comprises a single continuous material extending between opposite innermost sidewalls of the lip; and a lid joined to the integrated circuit chip by way of the interface material, wherein the interface material contacts the lid and the integrated circuit chip, wherein an outer edge of the lip is disposed outside of an outer edge of the lid. 7. A device comprising: a die over a substrate; a molding compound surrounding the die, the molding compound having a lip formed along a peripheral region of the molding compound, the lip including a first innermost sidewall that is outside an outermost periphery of the die and a first outermost sidewall that is continuous with a first outermost sidewall of the molding compound, wherein the molding compound has a first width measured between the first outermost sidewall of the molding compound and a second outermost sidewall of the molding compound opposite the first outermost sidewall of the molding compound; wherein the first innermost sidewall of the lip, the first outermost sidewall of the lip, the first outermost sidewall of the molding compound, and the second outermost sidewall of the molding compound are vertical in a direction perpendicular to a major surface of the substrate; and an interface material over the die and the molding compound, wherein the interface material is adjacent the lip, wherein the interface material has a second width measured between a first outermost sidewall of the interface material and a second outermost sidewall of the interface material opposite the first outermost sidewall of the interface material, wherein the second width is measured in a direction parallel to a direction in which the first width is measured, and wherein the first width is greater than the second width. 8. The device of claim 7 , wherein the interface material extends from the first innermost sidewall of the lip to a second innermost sidewall of the lip opposite the first innermost sidewall of the lip. 9. The device of claim 7 , further comprising a lid attached to the interface material. 10. The device of claim 9 , wherein the lid has a third width measured between a first outermost sidewall of the lid and a second outermost sidewall of the lid opposite the first outermost sidewall of the lid, wherein the third width is measured in a direction parallel to the direction in which the first width and the second width are measured, wherein the third width is equal to the second width. 11. The device of claim 7 , wherein the lip is L-shaped and is disposed at a corner of the molding compound. 12. The device of claim 7 , wherein the lip is continuous and encircles the interface material. 13. The device of claim 7 , wherein the interface material is in physical contact with the molding compound and the die. 14. The device of claim 7 , wherein the lip has a width from 300 micrometers to 350 micrometers. 15. The device of claim 6 , wherein the integrated circuit chip is mounted to the substrate using a plurality of connectors, wherein the molding compound extends between the integrated circuit chip and the substrate. 16. The device of claim 15 , wherein the molding compound extends between adjacent connectors of the plurality of connectors. 17. The device of claim 6 , wherein a width of the interface material between the opposite innermost sidewalls of the lip is equal to a distance between the opposite innermost sidewalls of the lip. 18. The device of claim 17 , wherein a width of the lid is equal to the width of the interface material and the distance between the opposite innermost sidewalls of the lip. 19. The device of claim 6 , wherein the lid contacts the opposite innermost sidewalls of the lip. 20. The device of claim 1 , wherein the molding compound includes a second lip, a third lip, and a fourth lip, and wherein the first lip, the second lip, the third lip, and the fourth lip encircle the thermal interface material.

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between stacked chips · CPC title

  • characterised by arrangements for thermal management of the stacked chips · CPC title

  • the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape · CPC title

Patent family

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Frequently asked questions

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What does patent US11328971B2 cover?
A device includes a substrate with a die over the substrate. A molding compound surrounds the die and includes a structural interface formed along a peripheral region of the molding compound.
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W74/10. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 10 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).