Chamber conditioning and removal processes

US11328909B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11328909-B2
Application numberUS-201715852911-A
CountryUS
Kind codeB2
Filing dateDec 22, 2017
Priority dateDec 22, 2017
Publication dateMay 10, 2022
Grant dateMay 10, 2022

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Exemplary methods for conditioning a processing region of a semiconductor processing chamber may include forming conditioning plasma effluents of an oxygen-containing precursor in a semiconductor processing chamber. The methods may include contacting interior surfaces of the semiconductor processing chamber bordering a substrate processing region with the conditioning plasma effluents. The methods may also include treating the interior surfaces of the semiconductor processing chamber.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method comprising: forming conditioning plasma effluents of an oxygen-containing precursor in a semiconductor processing chamber, wherein the conditioning plasma effluents are produced locally in a substrate processing region of the semiconductor processing chamber; contacting interior surfaces of the semiconductor processing chamber bordering the substrate processing region with the conditioning plasma effluents; and treating the interior surfaces of the semiconductor processing chamber, wherein the treating includes oxidizing fluorine radicals and removing residual fluorine from the interior surfaces of the semiconductor processing chamber, wherein the substrate processing region is essentially devoid of hydrogen during the operation of treating the interior surfaces of the semiconductor processing chamber with the conditioning plasma effluents. 2. The method of claim 1 , further comprising: transferring a substrate into the substrate processing region subsequent the operation of treating the interior surfaces with the conditioning plasma effluents, wherein the substrate comprises an exposed region of titanium nitride; flowing a fluorine-containing precursor into a remote plasma region fluidly coupled with the substrate processing region while forming a remote plasma in the remote plasma region to produce etching plasma effluents; and etching the exposed region of titanium nitride by flowing the etching plasma effluents into the substrate processing region through apertures in a showerhead, wherein the showerhead is disposed between the remote plasma region and the substrate processing region. 3. The method of claim 2 , wherein the substrate further includes an exposed region of tungsten, and wherein the etching removes titanium nitride at a selectivity relative to tungsten of greater than or about 100:1. 4. The method of claim 2 , wherein an amount of titanium nitride at an edge region of the substrate and an amount of titanium nitride at a central region of the substrate are etched to within about 5% of one another. 5. The method of claim 2 , further comprising flowing a hydrogen-containing precursor with the fluorine-containing precursor to produce the etching plasma effluents. 6. The method of claim 5 , wherein the hydrogen-containing precursor is hydrogen or ammonia. 7. The method of claim 2 , further comprising flowing an oxygen-containing precursor with the fluorine-containing precursor to produce the etching plasma effluents. 8. The method of claim 2 , wherein a temperature of the substrate is maintained between about 200° C. and about 500° C. during the etching. 9. The method of claim 1 , wherein a plasma power used to produce the conditioning plasma effluents is less than or about 500 W. 10. The method of claim 1 , wherein the substrate processing region is defined from above by a showerhead, and wherein a pedestal within the substrate processing region is maintained within about 5 cm of the showerhead during the treating. 11. A method comprising: forming conditioning plasma effluents of a fluorine-containing precursor and an oxygen-containing precursor in a substrate processing region of a semiconductor processing chamber; contacting interior surfaces of the semiconductor processing chamber bordering the substrate processing region with the conditioning plasma effluents; and treating the interior surfaces of the semiconductor processing chamber, wherein the treating includes oxidizing fluorine radicals and removing residual fluorine from the interior surfaces of the semiconductor processing chamber, wherein the substrate processing region is essentially devoid of hydrogen during the operation of treating the interior surfaces of the semiconductor processing chamber with the conditioning plasma effluents. 12. The method of claim 11 , further comprising: transferring a substrate into the substrate processing region subsequent the operation of treating the interior surfaces with the conditioning plasma effluents, wherein the substrate comprises an exposed region of titanium nitride; flowing a fluorine-containing precursor into a remote plasma region fluidly coupled with the substrate processing region while forming a remote plasma in the remote plasma region to produce etching plasma effluents; and etching the exposed region of titanium nitride by flowing the etching plasma effluents into the substrate processing region through apertures in a showerhead, wherein the showerhead is disposed between the remote plasma region and the substrate processing region. 13. The method of claim 12 , wherein a pressure within the semiconductor processing chamber is maintained between about 1 Torr and about 10 Torr. 14. The method of claim 12 , wherein a temperature of the substrate is maintained between about 200° C. and about 500° C. 15. A method comprising: forming conditioning plasma effluents of a fluorine-containing precursor and an oxygen-containing precursor in a substrate processing region of a semiconductor processing chamber; contacting interior surfaces of the semiconductor processing chamber bordering the substrate processing region with the conditioning plasma effluents; treating the interior surfaces of the semiconductor processing chamber, wherein the treating includes oxidizing fluorine radicals and removing residual fluorine from the interior surfaces of the semiconductor processing chamber, wherein the substrate processing region is essentially devoid of hydrogen during the operation of treating the interior surfaces of the semiconductor processing chamber with the conditioning plasma effluents; transferring a substrate into the substrate processing region, wherein the substrate comprises an exposed region of titanium nitride; flowing a fluorine-containing precursor into the substrate processing region; and etching the exposed region of titanium nitride by contacting the exposed region of titanium nitride with the fluorine-containing precursor. 16. The method of claim 15 , wherein a temperature of the substrate is maintained between about 200° C. and about 500° C. during the etching. 17. The method of claim 15 , wherein an amount of titanium nitride at an edge region of the substrate and an amount of titanium nitride at a central region of the substrate are etched to within about 5% of one another.

Assignees

Inventors

Classifications

  • using plasmas · CPC title

  • Local interconnections · CPC title

  • Barrier, adhesion or liner layers · CPC title

  • by selectively removing parts thereof (H10W20/034 takes precedence) · CPC title

  • in openings in dielectrics · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11328909B2 cover?
Exemplary methods for conditioning a processing region of a semiconductor processing chamber may include forming conditioning plasma effluents of an oxygen-containing precursor in a semiconductor processing chamber. The methods may include contacting interior surfaces of the semiconductor processing chamber bordering a substrate processing region with the conditioning plasma effluents. The meth…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H01J37/32862. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 10 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).