Laser diode module

Patent metadata

Field	Value
Publication number	US-11316322-B2
Application number	US-202016802294-A
Country	US
Kind code	B2
Filing date	Feb 26, 2020
Priority date	Mar 23, 2017
Publication date	Apr 26, 2022
Grant date	Apr 26, 2022

Abstract

A laser diode module is described herein. In accordance with a first exemplary embodiment, the laser diode module includes a first semiconductor die including at least one electronic switch, and a second semiconductor die including at least one laser diode. The second semiconductor die is bonded on the first semiconductor die using a chip-on-chip connecting technology to provide electrical connection between the electronic switch and the laser diode.

First claim

We claim:

1. A laser diode module comprising:
a first semiconductor die including at least one electronic switch;
a second semiconductor die including at least one laser diode; and
at least one buffer capacitor arranged as a trench capacitor,
wherein the first semiconductor die is a first bare die embedded in an intermediate level of a circuit board,
wherein the second semiconductor die is arranged on a top level of the circuit board,
wherein the at least one electronic switch and the at least one laser diode are connected in series directly between a first node at a supply terminal and a second node at a ground terminal,
wherein the at least one buffer capacitor is connected between the first node at the supply terminal and the second node at the ground terminal so that the at least one buffer capacitor is connected in parallel with the at least one electronic switch and the at least one laser diode,
wherein the at least one electronic switch and the at least one buffer capacitor are connected to the first node, and
wherein the at least one buffer capacitor and the at least one laser diode are connected to the second node.

2. The laser diode module of claim 1 , wherein the at least one buffer capacitor is embedded in the circuit board.

3. The laser diode module of claim 2 , wherein the at least one buffer capacitor is included in the first semiconductor die.

4. The laser diode module of claim 2 , wherein the at least one buffer capacitor is included in a third semiconductor die, wherein the third semiconductor die comprises a second bare die that is embedded in the intermediate level of the circuit board.

5. The laser diode module of claim 4 , wherein the third semiconductor die is arranged on a different level of the circuit board from the second semiconductor die.

6. The laser diode module of claim 4 , wherein the third semiconductor die is arranged on a first metallization layer of the circuit board.

7. The laser diode module of claim 4 ,
wherein the first semiconductor die is arranged between a first metallization layer and a second metallization layer of the circuit board, and
wherein the third semiconductor die is arranged between the first metallization layer and the second metallization layer of the circuit board.

8. The laser diode module of claim 2 , wherein the at least one buffer capacitor is configured to buffer a supply voltage.

9. The laser diode module of claim 1 , wherein the first semiconductor die is arranged between a first metallization layer and a second metallization layer of the circuit board.

10. The laser diode module of claim 1 , wherein the second semiconductor die comprises a flip-chip mounted on a surface of the circuit board.

11. The laser diode module of claim 1 , further comprising solder balls attached to a bottom level of the circuit board to allow soldering the circuit board onto another circuit board or a carrier board,
wherein the second semiconductor die is arranged in the top level of the circuit board.

12. A laser diode module comprising:
a circuit board including:
a first metallization layer on a top level of the circuit board; and
a second metallization layer on a bottom level of the circuit board;

a first semiconductor die including at least one electronic switch;
a second semiconductor die including at least one laser diode; and
a third semiconductor die including at least one buffer capacitor arranged as a trench capacitor; and
at least one buffer capacitor,
wherein the first semiconductor die is a first bare die embedded in an intermediate level of the circuit board between the first and second metallization layers,
wherein the second semiconductor die is flip-chip mounted on the first or second metallization layer, and
wherein the third semiconductor die is a second bare die embedded in the intermediate level of the circuit board between the first and second metallization layers,
wherein the at least one electronic switch and the at least one laser diode are connected in series directly between a first node at a supply terminal and a second node at a ground terminal,
wherein the at least one buffer capacitor is connected between the first node at the supply terminal and the second node at the ground terminal so that the at least one buffer capacitor is connected in parallel with the at least one electronic switch and the at least one laser diode,
wherein the at least one electronic switch and the at least one buffer capacitor are connected to the first node, and
wherein the at least one buffer capacitor and the at least one laser diode are connected to the second node.

13. The laser diode module of claim 12 ,
wherein the at least one buffer capacitor is configured to buffer a supply voltage.

14. The laser diode module of claim 12 , further comprising solder balls attached to the second metallization layer to allow soldering the circuit board onto another circuit board or a carrier board,
wherein the second semiconductor die is flip-chip mounted on the first metallization layer.

15. The laser diode module of claim 12 ,
wherein the first semiconductor die is separate from the second semiconductor die and the third semiconductor die, and
wherein the second semiconductor die is separate from the third semiconductor die.

Assignees

• Infineon Technologies Ag

Inventors

• Galvano Maurizio
• Furlan Gianmaria
• Logiudice Andrea
• Mignoli Franco

Classifications

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W72/874

  On different surfaces · CPC title

• H10W72/9413

  on encapsulations · CPC title