Semiconductor device package

Patent metadata

Field	Value
Publication number	US-11302646-B2
Application number	US-202016791946-A
Country	US
Kind code	B2
Filing date	Feb 14, 2020
Priority date	Feb 14, 2020
Publication date	Apr 12, 2022
Grant date	Apr 12, 2022

Abstract

A semiconductor device package includes a first substrate, a second substrate, a first electronic component, a second electronic component and a shielding layer. The second substrate is disposed over the first substrate. The first electronic component is disposed between the first substrate and the second substrate. The second electronic component is disposed between the first substrate and the second substrate and adjacent to the second substrate than the first electronic component. The shielding element electrically connects the second electronic component to the second substrate. The second electronic component and the shielding element define a space accommodating the first electronic component.

First claim

What is claimed is:

1. A semiconductor device package, comprising:
a first substrate;
a second substrate disposed over the first substrate;
a first electronic component disposed between the first substrate and the second substrate;
a second electronic component disposed between the first substrate and the second substrate and closer to the second substrate than the first electronic component;
a first package body covering the first electronic component, the second electronic component, and a first portion of a surface of the first substrate, the first package body exposing a second portion of the surface of the first substrate;
a third electronic component disposed on the second portion of the first surface of the first substrate;
a shielding element disposed between the first electronic component and the second electronic component, the shielding element configured to block electromagnetic radiation therebetween; and
a second package body disposed between the first substrate and the second substrate, the second package body covering the first electronic component, the second electronic component, and the shielding element.

2. The semiconductor device package of claim 1 , wherein the first electronic component and the second electronic component are at least partially overlapped in a direction substantially perpendicular to the first substrate or the second substrate.

3. The semiconductor device package of claim 1 , further comprising a first interposer disposed between the first substrate and the second substrate.

4. The semiconductor device package of claim 1 , further comprising:
a fourth electronic component disposed between the first substrate and the second substrate; and
a first compartment shield disposed between the first electronic component and the fourth electronic component.

5. The semiconductor device package of claim 1 , further comprising:
a fourth electronic component disposed on the second substrate;
an optical device disposed on the second substrate and side by side with the fourth electronic component; and
a first compartment shield disposed on the second substrate and between the fourth electronic component and the optical device.

6. The semiconductor device package of claim 1 , further comprising a connecting module disposed on the first substrate.

7. The semiconductor device package of claim 1 , wherein a lateral surface of the second substrate is recessed from a lateral surface of the first substrate in the direction substantially perpendicular to the first substrate.

8. The semiconductor device package of claim 1 , further comprising a fourth electronic component disposed on the first substrate, wherein the second substrate has an opening and the fourth electronic component extends within the opening.

9. A semiconductor device package, comprising:
a first substrate;
a second substrate disposed over the first substrate;
a first electronic component disposed between the first substrate and the second substrate;
a second electronic component disposed between the first substrate and the second substrate and closer to the second substrate than the first electronic component;
a first package body covering the first electronic component, the second electronic component, and a first portion of a surface of the first substrate, the first package body exposing a second portion of the surface of the first substrate;
a third electronic component disposed on the second portion of the first surface of the first substrate;
a fourth electronic component disposed on the second substrate;
an optical device disposed on the second substrate and side by side with the fourth electronic component;
a first compartment shield disposed on the second substrate and between the fourth electronic component and the optical device; and
a second package body disposed on the second substrate, wherein the second package body covers the fourth electronic component, the optical device and the first compartment shield and exposes a top surface of the first compartment shield and an upper portion of the optical device.

10. A semiconductor device package, comprising:
a first substrate;
a second substrate disposed over the first substrate;
a first electronic component disposed between the first substrate and the second substrate;
a second electronic component disposed between the first substrate and the second substrate and closer to the second substrate than the first electronic component;
a first package body covering the first electronic component, the second electronic component, and a first portion of a surface of the first substrate, the first package body exposing a second portion of the surface of the first substrate;
a third electronic component disposed on the second portion of the first surface of the first substrate;
a third substrate disposed over a surface of the first substrate facing away from the second substrate;
a fourth electronic component disposed on a surface of the third substrate facing the second surface of the first substrate; and
an interposer disposed between the first substrate and the third substrate, the interposer having a dielectric layer and a through via penetrating the dielectric layer and electrically connected to the first substrate and the third substrate.

11. The semiconductor device package of claim 10 , further comprising:
a second package body disposed between the first substrate and the third substrate and covering the fourth electronic component; and
a connector module disposed on the second surface of the third substrate.

12. A semiconductor device package, comprising:
a first carrier having a first surface;
a first electronic component disposed on the first surface of the first carrier;
an optical device disposed over the first surface of the first carrier;
a compartment shield disposed between the first electronic component and the optical device;
a first encapsulant exposing the optical device and encapsulating the first electronic component, wherein a portion of the first encapsulant separates the compartment shield from a receiving region of the optical device;
a second carrier disposed on the second surface of the first carrier, the second carrier having a first surface and a second surface opposite to the first surface;
a first interposer disposed between the first carrier and the second carrier;
a plurality of first electronic components disposed between the first carrier and the second carrier; and
a plurality of second electronic components disposed on the second surface of the second carrier;
wherein the first encapsulant further covers a portion of the first electronic components and exposes a portion of the second carrier.

13. The semiconductor device package of claim 12 , wherein the compartment shield is disposed through the first encapsulant.

14. The semiconductor device package of claim 12 , further comprising:
a third carrier disposed on the second surface of the second carrier, the third carrier having a first surface and a second surface opposite to the first surface;
a second interposer disposed between the second carrier and the third carrier;
a plurality of third electronic components disposed on the first surface of the third carrier and between the second carrier and the third carrier;
a fourth electronic component disposed second surface of the third carrier; and a second encapsulant encapsulating the third electronic components.

Assignees

• Advanced Semiconductor Eng

Inventors

• Hsieh Hao-Chih
• Lin Tzu-Cheng
• Chen Chun-Jen

Classifications

• H10W42/273

  the arrangements being between laterally adjacent chips, e.g. walls between chips · CPC title

• H10W42/276

  the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

• H10W90/401

  characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

• H10W70/611

  for connecting multiple chips together · CPC title

• H10W20/20 Primary

  Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title