Multilayer electronic component

Patent metadata

Field	Value
Publication number	US-11289270-B2
Application number	US-202016776610-A
Country	US
Kind code	B2
Filing date	Jan 30, 2020
Priority date	Aug 23, 2019
Publication date	Mar 29, 2022
Grant date	Mar 29, 2022

Abstract

A multilayer electronic component includes a body including a dielectric layer and an internal electrode, and an external electrode including an electrode layer disposed on the body and connected to the internal electrode, a first plating layer disposed on the electrode layer, and a conductive resin layer disposed on the first plating layer. The first plating layer has surface roughness higher at an interface with the conductive resin layer than at an interface with the electrode layer, and the conductive resin layer includes a conductive metal and a base resin.

First claim

What is claimed is:

1. A multilayer electronic component comprising:
a body including a dielectric layer and an internal electrode; and
an external electrode including an electrode layer disposed on the body and connected to the internal electrode, a first plating layer disposed on the electrode layer, and a conductive resin layer disposed on the first plating layer,
wherein the first plating layer has surface roughness higher at an interface with the conductive resin layer than at an interface with the electrode layer,
wherein the conductive resin layer includes a conductive metal and a base resin,
wherein the first plating layer comprises one or more selected from a group consisting of Cu, Sn, Ni, and alloys thereof, and
wherein the first plating layer comprises an oxide containing Cu in a region having the surface roughness at the interface with the conductive resin layer.

2. The multilayer electronic component of claim 1 , wherein the first plating layer has center line average roughness of 150 to 500 nm at the interface with the conductive resin layer.

3. The multilayer electronic component of claim 1 , wherein the first plating layer has a thickness of 300 to 2000 nm.

4. The multilayer electronic component of claim 1 , wherein the oxide containing Cu comprises Cu 2 O.

5. The multilayer electronic component of claim 1 , wherein the oxide containing Cu comprises CuO.

6. The multilayer electronic component of claim 1 , wherein the first plating layer has an intermetallic compound layer including Sn at the interface with the conductive resin layer.

7. The multilayer electronic component of claim 1 , wherein the external electrode further comprises a second plating layer disposed on the conductive resin layer.

8. The multilayer electronic component of claim 7 , wherein the second plating layer comprises a Ni plating layer disposed on the conductive resin layer and a Sn plating layer disposed on the Ni plating layer.

9. The multilayer electronic component of claim 1 , wherein the electrode layer comprises a conductive metal and glass.

10. The multilayer electronic component of claim 1 , wherein the electrode layer comprises Cu and glass, and the first plating layer is a Cu plating layer.

11. The multilayer electronic component of claim 1 , wherein the base resin includes an epoxy-based resin.

12. A multilayer electronic component comprising:
a body including alternately stacked first internal electrodes and second internal electrodes with dielectric layers therebetween; and
first and second external electrodes respectively connected to the first and second internal electrodes and each including an electrode layer disposed on the body and connected to the respective first or second internal electrodes, a first plating layer disposed on the electrode layer, and a conductive resin layer disposed on the first plating layer,
wherein each first plating layer has center line average roughness of 150 to 500 nm at an interface with the conductive resin layer,
wherein each first plating layer comprises one or more selected from a group consisting of Cu, Sn, Ni, and alloys thereof, and
wherein the first plating layer comprises an oxide containing Cu in a region having the roughness at the interface with the conductive resin layer.

13. The multilayer electronic component of claim 12 , wherein each first plating layer has a thickness of 300 to 2000 nm.

14. The multilayer electronic component of claim 12 , wherein each first plating layer has an intermetallic compound layer including Sn at the interface with the conductive resin layer.

15. The multilayer electronic component of claim 12 , wherein each electrode layer comprises a conductive metal and glass.

16. The multilayer electronic component of claim 12 , wherein each first plating layer has surface roughness higher at the interface with the conductive resin layer than at an interface with the electrode layer.

17. The multilayer electronic component of claim 12 , wherein each first plating layer has surface roughness higher at the interface with the conductive resin layer than a surface roughness at an interface between the body and the electrode layer.

18. The multilayer electronic component of claim 12 , wherein the conductive resin layer of each of the first and second external electrodes includes an epoxy-based resin.

19. A multilayer electronic component comprising:
a body including a dielectric layer and an internal electrode; and
an external electrode including an electrode layer disposed on the body and connected to the internal electrode, a first plating layer disposed on the electrode layer, and a conductive resin layer disposed on the first plating layer,
wherein the first plating layer has surface roughness higher at an interface with the conductive resin layer than a surface roughness at an interface between the body and the electrode layer,
wherein the first plating layer comprises one or more selected from a group consisting of Cu, Sn, Ni, and alloys thereof, and
wherein the first plating layer comprises an oxide containing Cu in a region having the surface roughness at the interface with the conductive resin layer.

20. The multilayer electronic component of claim 19 , wherein the first plating layer has center line average roughness of 150 to 500 nm at the interface with the conductive resin layer.

21. The multilayer electronic component of claim 19 , wherein the first plating layer has a thickness of 300 to 2000 nm.

22. The multilayer electronic component of claim 19 , wherein the first plating layer has surface roughness higher at the interface with the conductive resin layer than at an interface with the electrode layer.

23. The multilayer electronic component of claim 19 , wherein the conductive resin layer includes an epoxy-based resin.

24. A multilayer electronic component comprising:
a body including a dielectric layer and an internal electrode; and
an external electrode including an electrode layer disposed on the body and connected to the internal electrode through a surface of the body, a first plating layer disposed on the electrode layer, and a conductive resin layer disposed on the first plating layer,
wherein the electrode layer includes Cu and glass, the first plating layer is Cu plating layer, and the conductive resin layer includes a conductive metal and a base resin, and
wherein the conductive resin layer includes an outermost layer of the external electrode disposed on the surface of the body.

25. The multilayer electronic component of claim 24 , wherein the first plating layer has center line average roughness of 150 to 500 nm at the interface with the conductive resin layer.

26. The multilayer electronic component of claim 24 , wherein the first plating layer has a thickness of 300 to 2000 nm.

27. The multilayer electronic component of claim 24 , wherein the first plating layer has surface roughness at an interface with the conductive resin layer, and the first plating layer comprises CuO or Cu 2 O in a region having the surface roughness.

28. The multilayer electronic component of claim 24 , wherein the first plating layer has an intermetallic compound layer including Sn at the interface with the conductive resin layer.

29. The multilayer electronic component of claim 24 , wherein the first plating layer comprises one or more selected from

Assignees

• Samsung Electro Mech

Inventors

• Jun Ho In
• Kim Kyeong Jun
• Chun Jin Sung
• Shin Woo Chul
• Kim Seul Gi

Classifications

• H01G4/30 Primary

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H01G4/005

  Electrodes · CPC title

• H01G4/12

  Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

• H01G4/2325

  characterised by the material of the terminals · CPC title

• H01G4/008 Primary

  Selection of materials · CPC title