Multilayer electronic component

US10832869B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10832869-B2
Application numberUS-201916279070-A
CountryUS
Kind codeB2
Filing dateFeb 19, 2019
Priority dateAug 30, 2018
Publication dateNov 10, 2020
Grant dateNov 10, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer ceramic electronic component includes: a ceramic body including dielectric layers and a plurality of internal electrodes disposed to face each other with each of the dielectric layers interposed therebetween; and external electrodes disposed on external surfaces of the ceramic body and electrically connected to the internal electrodes, respectively, wherein the external electrodes including, respectively, electrode layers electrically connected to the internal electrodes, respectively, and conductive resin layers disposed on the electrode layers, respectively.

First claim

Opening claim text (preview).

What is claimed is: 1. A multilayer ceramic electronic component comprising: a ceramic body having first and second surfaces opposing each other in a first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other in a third direction, and including dielectric layers and a plurality of internal electrodes disposed to face each other in the first direction with each of the dielectric layers interposed therebetween; and multi-layer external electrodes disposed on the third and fourth surfaces of the ceramic body and electrically connected to the internal electrodes, respectively, wherein the ceramic body includes an active portion in which capacitance is formed by including the plurality of internal electrodes disposed to face each other with each of the dielectric layers interposed therebetween and cover portions disposed on upper and lower surfaces of the active portion in the first direction, respectively, the multi-layer external electrodes each including an electrode layer electrically connected to the plurality of internal electrodes, respectively, and a conductive resin layer disposed on the electrode layer, each conductive resin layer extending onto and into contact with the first and second surfaces of the ceramic body, and a ratio of a thickness of each of the cover portions in the first direction to a first distance in the second direction from one end of each respective multi-layer external electrode, including the conductive resin layer contacting the first or second surface of the ceramic body, to an opposing outermost surface of the respective multi-layer external electrode in the second direction, ranges from 20 to 60%. 2. The multilayer ceramic electronic component of claim 1 , wherein a ratio of the first distance to a length of the ceramic body in the second direction ranges from 20 to 35%. 3. The multilayer ceramic electronic component of claim 1 , wherein the electrode layer of each multi-layer external electrode includes one or more conductive metals selected from the group consisting of copper (Cu), silver (Ag), nickel (Ni), and alloys thereof. 4. The multilayer ceramic electronic component of claim 1 , wherein the conductive resin layer of each multi-layer external electrode includes one or more conductive metals selected from the group consisting of copper (Cu), silver (Ag), nickel (Ni), and alloys thereof, and a base resin. 5. The multilayer ceramic electronic component of claim 1 , wherein a thickness of each internal electrode is less than 1 μm. 6. The multilayer ceramic electronic component of claim 1 , wherein a thickness of each dielectric layer is less than 2.8 μm. 7. The multilayer ceramic electronic component of claim 1 , wherein td>2×te in which dimension “td” is a thickness of each dielectric layer and dimension “te” is a thickness of each internal electrode. 8. A multilayer ceramic electronic component comprising: a ceramic body having first and second surfaces opposing each other in a first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other in a third direction, and including dielectric layers and a plurality of internal electrodes disposed to face each other in the first direction with each of the dielectric layers interposed therebetween, wherein a thickness of each dielectric layer is less than 2.8 μm; and multi-layer external electrodes disposed on the third and fourth surfaces of the ceramic body and electrically connected to the internal electrodes, respectively, wherein the ceramic body includes an active portion in which capacitance is formed by including the plurality of internal electrodes disposed to face each other with each of the dielectric layers interposed therebetween and cover portions disposed on upper and lower surfaces of the active portion in the first direction, respectively, the multi-layer external electrodes each including an electrode layer electrically connected to the plurality of internal electrodes, respectively, and a conductive resin layer disposed on the electrode layer, each conductive resin layer extending onto and into contact with the first and second surfaces of the ceramic body, and a first distance in the second direction from one end of each respective multi-layer external electrode, including the conductive resin layer contacting the first or second surface of the ceramic body, to an opposing outermost surface of the respective multi-layer external electrode in the second direction, is configured such that: a first ratio of a thickness of each of the cover portions in the first direction to the first distance ranges from 20 to 60%, and a second ratio of the first distance to a length of the ceramic body in the second direction ranges from 20 to 35%. 9. The multilayer ceramic electronic component of claim 8 , wherein the electrode layer of each multi-layer external electrode includes one or more conductive metals selected from the group consisting of copper (Cu), silver (Ag), nickel (Ni), and alloys thereof. 10. The multilayer ceramic electronic component of claim 8 , wherein the conductive resin layer of each multi-layer external electrode includes one or more conductive metals selected from the group consisting of copper (Cu), silver (Ag), nickel (Ni), and alloys thereof, and a base resin. 11. The multilayer ceramic electronic component of claim 8 , wherein a thickness of each internal electrode is less than 1 μm. 12. The multilayer ceramic electronic component of claim 8 , wherein td>2×te in which dimension “td” is a thickness of each dielectric layer and dimension “te” is a thickness of each internal electrode.

Assignees

Inventors

Classifications

  • Form of non-self-supporting electrodes · CPC title

  • characterised by the ceramic dielectric material (H01G4/1272, H01G4/1281 take precedence) · CPC title

  • H01G4/232Primary

    electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • Fried electrodes · CPC title

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What does patent US10832869B2 cover?
A multilayer ceramic electronic component includes: a ceramic body including dielectric layers and a plurality of internal electrodes disposed to face each other with each of the dielectric layers interposed therebetween; and external electrodes disposed on external surfaces of the ceramic body and electrically connected to the internal electrodes, respectively, wherein the external electrodes …
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H01G4/232. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 10 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).