Silicon carbide devices and methods for manufacturing the same

US11282805B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11282805-B2
Application numberUS-201916360570-A
CountryUS
Kind codeB2
Filing dateMar 21, 2019
Priority dateMar 22, 2018
Publication dateMar 22, 2022
Grant dateMar 22, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes a silicon carbide layer, a metal carbide layer arranged over the silicon carbide layer, and a solder layer arranged over and in contact with the metal carbide layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a silicon carbide layer; a metal carbide layer arranged over the silicon carbide layer; and a solder layer arranged over and in contact with the metal carbide layer, wherein the solder layer comprises a carbide-forming metal corresponding to a metal of the metal carbide layer. 2. The semiconductor device of claim 1 , further comprising: a carbon-comprising layer arranged between the silicon carbide layer and the metal carbide layer, wherein the carbon-comprising layer is in contact with the silicon carbide layer and in contact with the metal carbide layer. 3. The semiconductor device of claim 2 , wherein the carbon-comprising layer has a graphite crystal structure or a graphite-like crystal structure. 4. The semiconductor device of claim 2 , further comprising: an ohmic contact formed between the silicon carbide layer and the carbon-comprising layer. 5. The semiconductor device of claim 1 , wherein the metal carbide layer is in contact with the silicon carbide layer. 6. The semiconductor device of claim 1 , wherein the metal carbide layer comprises titanium carbide, nickel carbide, tungsten carbide, and/or vanadium carbide. 7. The semiconductor device of claim 1 , wherein a thickness of the metal carbide layer is in a range from 50 nanometer to 1 micrometer. 8. The semiconductor device of claim 1 , further comprising: an ohmic contact formed between the silicon carbide layer and the metal carbide layer. 9. The semiconductor device of claim 1 , further comprising: a solder contact formed between the solder layer and a metal component that comprises a leadframe, a die pad, a lead, a clip, and/or a metal foil. 10. The semiconductor device of claim 1 , wherein the semiconductor device comprises a silicon carbide diode or a silicon carbide transistor. 11. A method, comprising: forming a carbon-comprising layer on a silicon carbide layer; forming a solder layer over the carbon-comprising layer, the solder layer comprising a carbide-forming metal; and forming a metal carbide layer between the carbon-comprising layer and the solder layer, the metal carbide layer being formed from the carbide-forming metal of the solder layer and carbon of the carbon-comprising layer. 12. The method of claim 11 , further comprising: forming a solder contact between the solder layer and a metal component. 13. The method of claim 12 , wherein the metal carbide layer is at least partly formed by forming the solder contact. 14. The method of claim 11 , wherein the metal carbide layer is at least partly formed by forming the solder layer on the carbon-comprising layer. 15. The method of claim 11 , wherein forming the carbon-comprising layer comprises: applying a laser process or a micro electrical discharge machining process to the silicon carbide layer. 16. The method of claim 11 , wherein forming the carbon-comprising layer comprises: evaporating silicon atoms from the silicon carbide layer. 17. The method of claim 11 , wherein the solder layer comprises a rare earth metal before forming the metal carbide layer. 18. The method of claim 11 , wherein the solder layer comprises residual portions of the carbide-forming metal after forming the metal carbide layer. 19. The method of claim 11 , wherein a thickness of the carbon-comprising layer is in a range from 1 nanometer to 10 micrometers before forming the metal carbide layer. 20. The method of claim 11 , wherein the silicon carbide layer is part of a silicon carbide wafer.

Assignees

Inventors

Classifications

  • batch processes · CPC title

  • of strap connectors · CPC title

  • of die-attach connectors · CPC title

  • Die-attach connectors and strap connectors · CPC title

  • not comprising solid metals or solid metalloids, e.g. polymers, ceramics or liquids · CPC title

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Frequently asked questions

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What does patent US11282805B2 cover?
A semiconductor device includes a silicon carbide layer, a metal carbide layer arranged over the silicon carbide layer, and a solder layer arranged over and in contact with the metal carbide layer.
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10D64/0115. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 22 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).