Array substrate and method for manufacturing the same, display panel, and display device

Patent metadata

Field	Value
Publication number	US-11262631-B2
Application number	US-202016825084-A
Country	US
Kind code	B2
Filing date	Mar 20, 2020
Priority date	Nov 29, 2019
Publication date	Mar 1, 2022
Grant date	Mar 1, 2022

Abstract

The preset disclosure provides an array substrate and a method for manufacturing the same, a display panel and a display device. The array substrate includes: a base substrate; data lines and pixel electrodes located on the base substrate, and a light shielding structure located on a side of the data lines close to the base substrate, orthographic projections of the gaps on the base substrate are located within an orthographic projection of the light shielding structure on the base substrate, and the light shielding structure includes a metal layer and a first transparent layer located on a side of the metal layer away from the base substrate.

First claim

What is claimed is:

1. An array substrate, comprising:
a base substrate;
data lines and pixel electrodes arranged on the base substrate; and
a light shielding structure disposed between the data lines and the base substrate, the light shielding structure comprising a metal layer and a first transparent layer located on a side of the metal layer away from the base substrate,
wherein the light shielding structure and a gate metal layer of the array substrate are formed in a same layer with a same material, and
wherein the light shielding structure further comprises:
a second transparent layer located on a side of the metal layer close to the base substrate.

2. The array substrate according to claim 1 , wherein,
the metal layer is made of copper;
the first transparent layer and/or the second transparent layer are made of molybdenum oxide.

3. The array substrate according to claim 1 , wherein a film thickness of the first transparent layer satisfies a formula as follows:
2* n 1* h 1=(2 k− 1)*(λ1/2);

wherein n1 is a refractive index of the first transparent layer, h1 is the film thickness of the first transparent layer, k is a positive integer, λ1 is a wave length of light incident from a side of the first transparent layer away from the base substrate.

4. The array substrate according to claim 3 , wherein n1 ranges from 2.2 to 2.3, and the film thickness of the first transparent layer ranges from 50 nm to 60 nm.

5. The array substrate according to claim 2 , wherein a film thickness of the second transparent layer satisfies a formula as follows:
2* n 2* h 2=(2 k− 1)*(λ2/2);

wherein n2 is a refractive index of the second transparent layer, h2 is the film thickness of the second transparent layer, k is a positive integer, λ2 is a wave length of light incident from a side of the second transparent layer away from the metal layer.

6. The array substrate according to claim 5 , wherein n2 ranges from 2.2 to 2.3, and the film thickness of the second transparent layer ranges from 50 nm to 60 nm.

7. The array substrate according to claim 1 , wherein there are gaps between orthographic projections of the data lines on the base substrate and orthographic projections of outlines of the pixel electrodes on the base substrate, and orthographic projections of the gaps on the base substrate are located within an orthographic projection of the light shielding structure on the base substrate.

8. A display device, comprising the array substrate according to claim 1 and a color-filter substrate arranged opposite to the array substrate, the array substrate being located on a light outgoing side of the color-filter substrate.

9. A method for manufacturing an array substrate, comprising:
providing a base substrate;
forming data lines and pixel electrodes on the base substrate, wherein there are gaps between orthographic projections of the data lines on the base substrate and orthographic projections of outlines of the pixel electrodes on the base substrate; and
forming a light shielding structure on a side of the date lines close to the base substrate, wherein orthographic projections of the gaps on the base substrate are located within an orthographic projection of the light shielding structure on the base substrate, and the light shielding structure comprises a metal layer and a first transparent layer located on a side of the metal layer away from the base substrate,
wherein the forming the light shielding structure comprises:
forming the light shielding structure and a gate metal layer of the array substrate through a single pattering process; and
wherein the forming the light shielding structure further comprises:
forming a second transparent layer on a side of the metal layer close to the base substrate.

10. The method for manufacturing an array substrate according to claim 9 , comprising:
forming, on the base substrate, a three-layer structure comprising a molybdenum oxide layer, a copper layer and a molybdenum oxide layer;
coating a photoresist on the three-layer structure, and exposing and developing the photoresist to form a photoresist pattern; and
etching the three-layer structure by an etching solution by using the photoresist pattern as a mask, to form the light shielding structure and the gate metal layer of the array substrate.

11. The method for manufacturing an array substrate according to claim 10 , wherein the forming the molybdenum oxide layer on the base substrate comprises:
bombarding a molybdenum oxide target with a plasma to form the molybdenum oxide layer on the base substrate, wherein a gas flow rate of a sputtering gas forming the plasma ranges from 600 to 800 sccm, a deposition pressure ranges from 0.25 to 0.35 pa, a sputtering power ranges from 7.5 to 8.5 kw, and a film formation rate of the molybdenum oxide layer ranges from 1.3 to 1.4 nm/s.

Assignees

• Beijing Boe Display Tech Co
• Boe Technology Group Co Ltd

Inventors

• Jia Yihe
• Ding Xiangqian
• Zhang Xiaoxiang
• Han Hao
• Yang Lianjie
• Song Yongzhi
• Pang Yan

Classifications

• G02F1/136209 Primary

  Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

• G02F1/136222

  Colour filters incorporated in the active matrix substrate · CPC title

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/13629

  Multilayer wirings · CPC title

• G02F1/13625

  Patterning using multi-mask exposure · CPC title