Oxygen-free plasma etching for contact etching of resistive random access memory

Patent metadata

Field	Value
Publication number	US-11258012-B2
Application number	US-201916385179-A
Country	US
Kind code	B2
Filing date	Apr 16, 2019
Priority date	Dec 19, 2018
Publication date	Feb 22, 2022
Grant date	Feb 22, 2022

Abstract

A resistive random access memory (RERAM) apparatus and method for forming the apparatus are provided. Oxygen content control in the RERAM is provided. To provide oxygen content control, a via to an electrode of the RERAM is formed utilizing an oxygen-free plasma etch step. In one embodiment, the dielectric within which the via is formed is silicon nitride (SiN). In exemplary embodiments, the plasma chemistry is a hydrofluorocarbon (C x H y F z )-based plasma chemistry or a fluorocarbon (C x F y )-based plasma chemistry. In one embodiment, the resistive layer of the RERAM is a metal oxide. In another embodiment, the oxygen concentrations in the electrode of the RERAM under the via and outside the via are the same after formation of the via.

First claim

What is claimed is:

1. A method of forming a resistive random access memory (RERAM), comprising:
providing a first RERAM electrode layer;
providing a RERAM resistive dielectric layer;
providing a second RERAM electrode layer, wherein the RERAM resistive dielectric layer is between the first RERAM electrode layer and the second RERAM electrode layer;
providing a first dielectric layer overlying the second RERAM electrode layer;
utilizing an oxygen-free plasma etch to etch at least a portion of the first dielectric layer so as to expose a portion of the second RERAM electrode as part of a process to form a via in the first dielectric layer so as to provide a region for making electrical contact to the second RERAM electrode; and
filling the via with a via conductor that extends from the second RERAM electrode layer to a top of the via, the via conductor having (i) a bottom surface that is in direct contact with the second RERAM electrode and (ii) a top surface that is in direct contact with a metal layer at the top of the via,
wherein utilizing the oxygen-free plasma etch controls oxygen vacancies in the RERAM.

2. The method of claim 1 , wherein the RERAM resistive dielectric layer comprises a metal oxide selected from a group of hafnium oxide (HfO), tantalum oxide (TaOx), aluminum oxide (AlOx), zirconium oxide (ZrOx) or titanium oxide (TiOx) and their mixtures.

3. The method of claim 1 , the first dielectric layer comprising silicon nitride.

4. The method of claim 3 , the RERAM resistive dielectric layer comprising hafnium oxide (HfO), tantalum oxide (TaOx), aluminum oxide (AlOx), zirconium oxide (ZrOx) or titanium oxide (TiOx) and their mixtures.

5. The method of claim 4 , the oxygen-free plasma etch being a hydrofluorocarbon or fluorocarbon-based plasma etch.

6. The method of claim 5 , the oxygen-free plasma etch being a hydrofluorocarbon-based plasma etch.

7. The method of claim 6 , the hydrofluorocarbon comprising C 4 H 9 F.

8. The method of claim 1 , the oxygen-free plasma etch being a hydrofluorocarbon or fluorocarbon-based plasma etch.

9. The method of claim 8 , the oxygen-free plasma etch being a hydrofluorocarbon-based plasma etch.

10. The method of claim 9 , the hydrofluorocarbon comprising C 4 H 9 F.

11. A method of forming a resistive random access memory (RERAM), comprising:
providing a first RERAM electrode layer;
providing a RERAM resistive dielectric layer;
providing a second RERAM electrode layer, wherein the RERAM resistive dielectric layer is between the first RERAM electrode layer and the second RERAM electrode layer;
encapsulating at least a portion of the first RERAM electrode layer, the second RERAM electrode layer and the RERAM resistive dielectric layer with a first dielectric;
etching a via through the first dielectric so as to expose a first portion of the second RERAM electrode layer, the etching performed in a manner so that the first portion of the second RERAM electrode layer is subjected to an oxygen-free plasma etch, the oxygen-free plasma etch being a hydrofluorocarbon or fluorocarbon-based plasma etch, and
filling the via with a via conductor that extends from the second RERAM electrode layer to a top of the via, the via conductor having (i) a bottom surface that is in direct contact with the second RERAM electrode and (ii) a top surface that is in direct contact with a metal layer at the top of the via.

12. The method of claim 11 , the first dielectric comprising a silicon nitride.

13. The method of claim 12 , the oxygen-free plasma etch being a hydrofluorocarbon-based plasma etch.

14. The method of claim 13 , the hydrofluorocarbon comprising C 4 H 9 F.

15. A method of forming a resistive random access memory (RERAM), comprising:
providing a first RERAM electrode layer;
providing a RERAM resistive dielectric layer;
providing a second RERAM electrode layer, wherein the RERAM resistive dielectric layer is between the first RERAM electrode layer and the second RERAM electrode layer;
encapsulating at least a portion of the first RERAM electrode layer, the second RERAM electrode layer and the RERAM resistive dielectric layer with a first dielectric; and
etching a via through the first dielectric so as to expose a first portion of the second RERAM electrode layer, the etching performed in a manner so that the first portion of the second RERAM electrode layer is subjected to an oxygen-free plasma etch, the oxygen-free plasma etch being a hydrofluorocarbon or fluorocarbon-based plasma etch,
wherein a first oxygen concentration in the first portion of the second RERAM electrode layer is the same as a second oxygen concentration in second portions of the second RERAM electrode layer, the second portions of the second RERAM electrode layer not being exposed to the oxygen-free plasma etch.

16. The method of claim 15 , wherein the RERAM resistive dielectric layer comprises hafnium oxide (HfO).

17. The method of claim 1 , wherein the first RERAM electrode layer and the second RERAM electrode layer are formed of a same material.

18. The method of claim 1 , wherein the second RERAM electrode layer is in direct contact with the RERAM resistive dielectric layer.

19. The method of claim 11 , wherein the first RERAM electrode layer and the second RERAM electrode layer are formed of a same material.

20. The method of claim 11 , wherein the second RERAM electrode layer is in direct contact with the RERAM resistive dielectric layer.

Assignees

• Tokyo Electron Ltd
• IBM

Inventors

• Koty Devi
• Yang Qingyun
• Miyazoe Hiroyuki
• Ando Takashi
• Cartier Eduard
• Narayanan Vijay
• Englemann Sebastian Ulrich

Classifications

• H01L45/146

  Electricity · mapped topic

• H01L45/1253

  Electricity · mapped topic

• H01L45/1233

  Electricity · mapped topic

• H01L27/2436

  Electricity · mapped topic

• H01L45/1675 Primary

  Electricity · mapped topic