Methods for forming structures with desired crystallinity for MRAM applications

US11245069B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11245069-B2
Application numberUS-201615199006-A
CountryUS
Kind codeB2
Filing dateJun 30, 2016
Priority dateJul 14, 2015
Publication dateFeb 8, 2022
Grant dateFeb 8, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for spin-transfer-torque magnetoresistive random access memory (STT-MRAM) applications. In one embodiment, the method includes patterning a film stack having a tunneling barrier layer disposed between a magnetic reference layer and a magnetic storage layer disposed on a substrate to remove a portion of the film stack from the substrate until an upper surface of the substrate is exposed, forming a sidewall passivation layer on sidewalls of the patterned film stack and subsequently performing a thermal annealing process to the film stack.

First claim

Opening claim text (preview).

What is claimed is: 1. A film stack utilized to form a magnetic tunnel junction structure on a substrate, comprising: a pinned layer disposed on the substrate, wherein the pinned layer comprises multiple layers including at least one or more layers selected from the group consisting of a Co containing layer, Pt containing layer, Ta containing layer, and an Ru containing layer; a structure decoupling layer disposed on the pinned layer fabricated from at least one of Mo or W; a magnetic reference layer disposed on the structure decoupling layer; a tunneling barrier layer disposed on the magnetic reference layer; a magnetic storage layer disposed on the tunneling barrier layer; a capping layer disposed on the magnetic storage layer; a sidewall passivation layer in direct contact with sidewalls of the film stack, the sidewall passivation layer extending from the capping layer to the pinned layer, wherein the sidewall passivation layer is conformally in direct contact with a top surface of the substrate, the sidewall passivation layer having a vertical portion continuously coplanar along a vertical axis normal to a major axis of the substrate and a horizontal portion in direct contact with the substrate; and an insulation layer formed on and in direct contact with the sidewall passivation layer, wherein the insulation layer extends from a top surface of the sidewall passivation layer to the horizontal portion of the sidewall passivation. 2. The film stack of claim 1 , wherein the capping layer includes at least a Ta containing or Ru containing layer disposed on a Co containing layer. 3. The film stack of claim 2 , wherein the capping layer comprises the Co containing layer disposed on a Mg containing layer. 4. The film stack of claim 2 , wherein the capping layer comprises the Ta containing or Ru containing layer disposed on a Mo containing layer. 5. The film stack of claim 1 , wherein the multiple layers included in the pinned layer comprises in total 10 layers. 6. The film stack of claim 1 , wherein the Co containing layer in the pinned layer is a CoFeB layer. 7. The film stack of claim 1 , wherein the magnetic storage layer comprises at least two Co containing layers sandwiching a layer including at least one of Ta, Mo or W containing materials. 8. The film stack of claim 1 , wherein the tunneling barrier layer is selected from a group consisting of MgO, HfO 2 , TiO 2 , TaO x and Al 2 O 3 . 9. The film stack of claim 1 , wherein the magnetic reference layer is CoFeB. 10. The film stack of claim 1 , wherein the capping layer includes a magnetic layer. 11. The film stack of claim 10 , wherein the magnetic layer is selected from a group consisting of CoFeB, MgO, Ta and Ru. 12. The film stack of claim 1 , wherein the pinned layer comprises a TaN layer in direct contact with the substrate. 13. The film stack of claim 1 , wherein the sidewall passivation layer is fabricated from a material selected from a group consisting of SiN, SiCN, SiO2, SiON, SiC, amorphous carbon, SiOC, Al2O3 and AlN. 14. The film stack of claim 1 , wherein the structure decoupling layer further comprises at least one of CoFe and CoFeB. 15. The film stack of claim 1 , wherein the capping layer comprises a Ru containing layer disposed on a Ta containing layer. 16. The film stack of claim 1 , wherein the insulation layer comprises SiO2. 17. The film stack of claim 1 , wherein a trench, a via, or both are disposed in the insulation layer. 18. The film stack of claim 1 , wherein the Co containing layer of the pinned layer has a thickness of between about 0 Angstroms and about 10 Angstroms. 19. The film stack of claim 1 , wherein the Ru containing layer of the pinned layer has a thickness of between about 3 Angstroms and about 10 Angstroms. 20. The film stack of claim 1 , wherein the Pt containing layer of the pinned layer has a thickness of between about 0 Angstroms and about 5 Angstroms. 21. The film stack of claim 1 , wherein the Ta containing layer of the pinned layer has a thickness of between about 0 and about 5 Angstroms. 22. The film stack of claim 1 , wherein the pinned layer further comprises multiple layers including at least one or more layers selected from the group consisting of a Ni containing layer, a Pd containing layer, and an FeBO containing layer.

Assignees

Inventors

Classifications

  • using elements in which the storage effect is based on magnetic spin effect · CPC title

  • H10N50/01Primary

    Manufacture or treatment · CPC title

  • H10N50/80Primary

    Constructional details · CPC title

  • Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices · CPC title

  • Materials of the active region · CPC title

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What does patent US11245069B2 cover?
Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for spin-transfer-torque magnetoresistive random access memory (STT-MRAM) applications. In one embodiment, the method includes patterning a film stack having a tunneling barrier layer disposed between a magnetic reference layer and a magnetic storage layer disp…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10N50/01. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 08 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).