Organic light emitting display device and method of manufacturing organic light emitting display device

Patent metadata

Field	Value
Publication number	US-11211441-B2
Application number	US-201816199226-A
Country	US
Kind code	B2
Filing date	Nov 26, 2018
Priority date	Nov 27, 2017
Publication date	Dec 28, 2021
Grant date	Dec 28, 2021

Abstract

An OLED device includes a substrate, a first active layer, a first gate electrode, a second gate electrode, first source and first drain electrodes, a first high dielectric constant (high-k) insulation structure, and a light emitting structure. The substrate has a first region and a second region. The first active layer is disposed in the first region on the substrate. The first gate electrode is disposed on the first active layer, and has a first thickness. The second gate electrode is disposed on the first gate electrode. The first source electrode and first drain electrode are disposed on the second gate electrode, and constitutes a first semiconductor element together with the first active layer and the first gate electrode. The first high-k insulation structure is disposed between the first gate electrode and the second gate electrode, and is spaced apart from the first source electrode and first drain electrode.

First claim

What is claimed is:

1. An organic light emitting display (OLED) device, comprising:
a substrate comprising a first region and a second region located adjacent to the first region;
a first active layer disposed in the first region on the substrate;
a first gate electrode disposed on the first active layer, the first gate electrode comprising a first thickness;
a second gate electrode disposed on the first gate electrode;
a first source electrode and a first drain electrode disposed on the first active layer;
a first high dielectric constant (high-k) insulation structure disposed between the first gate electrode and the second gate electrode, the first high-k insulation structure being spaced apart from the first source electrode and the first drain electrode;
a light emitting structure disposed in the first region on the first source electrode;
a second active layer disposed in the second region on the substrate;
a third gate electrode disposed on the second active layer, the third gate electrode having a second thickness less than the first thickness; and
a second source electrode and a second drain electrode disposed on the second active layer,
wherein:
the first high-k insulation structure comprises a first high-k insulation layer pattern and a first insulation layer pattern that are not in contact with the first source electrode and are not in contact with the first drain electrode; and
the first gate electrode and the third gate electrode are located at a same layer.

2. The OLED device of claim 1 , wherein the first high-k insulation structure covers the first gate electrode.

3. The OLED device of claim 1 , wherein the first high-k insulation structure is disposed only on an upper surface of the first gate electrode.

4. The OLED device of claim 1 , wherein
the first high-k insulation layer pattern is in contact with an upper surface of the first gate electrode, the first high-k insulation layer pattern being spaced apart from a lower surface of the second gate electrode; and
the first insulation layer pattern is simultaneously in contact with the lower surface of the second gate electrode and an upper surface of the first high-k insulation layer pattern, the first insulation layer pattern having a low dielectric constant less than the first high-k insulation layer pattern.

5. The OLED device of claim 1 , wherein
the first high-k insulation layer pattern is in contact with a lower surface of the second gate electrode; and
the first insulation layer pattern is simultaneously in contact with an upper surface of the first gate electrode and a lower surface of the first high-k insulation layer pattern, the first insulation layer pattern having a low dielectric constant less than the first high-k insulation layer pattern.

6. The OLED device of claim 1 , further comprising:
a second active layer disposed in the second region on the substrate;
a third gate electrode disposed on the second active layer, the third gate electrode comprising a second thickness which is less than the first thickness; and
a second source electrode and a second drain electrode.

7. The OLED device of claim 1 , wherein the substrate further comprises:
a third region spaced apart from the second region, the third region being located adjacent to the first region,
wherein the OLED device further comprises:
a first gate electrode pattern disposed in the third region on the substrate, the first gate electrode pattern having a second thickness, which is less than the first thickness;
a second gate electrode pattern spaced apart from the first gate electrode pattern in the third region on the substrate; and
a second high-k insulation structure overlapping under the second electrode pattern.

8. The OLED device of claim 7 , wherein
the first gate electrode and the first gate electrode pattern are located at a same layer, and
the second gate electrode and the second gate electrode pattern are located at a same layer.

9. The OLED device of claim 8 , wherein the second high-k insulation structure comprises:
a second high-k insulation layer pattern disposed adjacent to the substrate; and
a second insulation layer pattern disposed on the second high-k insulation layer pattern.

10. The OLED device of claim 1 , wherein the first gate electrode, the second gate electrode, and the first high-k insulation structure are defined as a first capacitor.

11. The OLED device of claim 1 , further comprising:
a gate insulation layer interposed between the first active layer and the gate electrode;
a first insulating interlayer disposed on the second gate electrode; and
a second insulating interlayer interposed between the first insulating interlayer and the first source electrode and the first drain electrode.

12. The OLED device of claim 11 , wherein the first insulating interlayer comprises:
a first contact hole exposing a first portion of the first active layer such that the first source electrode is in contact with the first active layer; and
a second contact hole exposing a second portion of the active layer such that the first drain electrode is in contact with the first active layer, the second portion being spaced apart from the first portion.

13. The OLED device of claim 12 , further comprising:
a first electrode pattern interposed between the first insulating interlayer and the second insulating interlayer on the substrate; and
a second electrode pattern disposed to overlap the first electrode pattern on the second insulating interlayer,
wherein the second electrode pattern together with the first electrode pattern define a second capacitor.

14. The OLED device of claim 1 , wherein the light emitting structure comprises:
a light emitting layer disposed on the lower electrode; and
lower electrode disposed on the first semiconductor element;
an upper electrode disposed on the light emitting layer.

15. A method of manufacturing an OLED device, the method comprising:
providing a substrate having a first region, and a second region that is located adjacent to the first region;
forming a first active layer in the first region on the substrate;
forming a second active layer in the second region on the substrate;
forming a first gate electrode on the first active layer;
forming a third gate electrode on the second active layer, the first gate electrode and the third gate electrode having a first thickness;
forming a preliminary high-k insulation structure on the entire substrate such that the first gate electrode and the third gate electrode are covered;
forming a preliminary second gate electrode layer on the entire preliminary high-k insulation structure;
forming a second gate electrode on the first gate electrode, a first high-k insulation structure interposed between the first gate electrode and second gate electrode, and a third gate electrode having a second thickness, which is less than a first thickness, by selectively etching the preliminary second electrode layer and the preliminary high-k insulation structure;
forming a first insulating interlayer on the second gate electrode;
forming a second insulating interlayer on the first insulating interlayer;
forming a first contact hole exposing a first portion of the first active layer by removing a first portion of both the first insulating interlayer and the second insulating interlayer;
forming a second contact hole exposing a second portion of the first active layer by removing a second portion of both the first insulating interlayer and the second insulating interlayer; and
forming a light emitting structure on the second gate

Assignees

• Samsung Display Co Ltd

Inventors

• Jeong Yu-Gwang
• Bae Subin
• Lee Joongeol
• Kim Sanggab

Classifications

• H10D30/6733

  Multi-gate TFTs · CPC title

• H10D30/674

  characterised by the active materials · CPC title

• H10K59/1216 Primary

  the pixel elements being capacitors · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title