Photomask design for generating plasmonic effect

Patent metadata

Field	Value
Publication number	US-11211374-B2
Application number	US-202016901232-A
Country	US
Kind code	B2
Filing date	Jun 15, 2020
Priority date	Jun 29, 2017
Publication date	Dec 28, 2021
Grant date	Dec 28, 2021

Abstract

A method includes providing a photomask having a patterned absorption layer over a substrate. The photomask is irradiated with a beam having a mixture of transverse electronic (TE) waves and transverse magnetic (TM) waves. The irradiating includes generating surface plasmonic polaritons (SPP) on a sidewall of the patterned absorption layer. The SPP is used to suppress the TM waves while reflecting the TE waves. A target substrate is exposed to TE waves.

First claim

What is claimed is:

1. A method of preparing a mask for semiconductor device fabrication, comprising:
receiving a selection of a lithography source having radiation of a wavelength centered around 193 nanometers (nm);
determining a composition having a dielectric function with a real part of about - 1 at the wavelength; and
forming a mask based on the received selection of the lithography source and the determined composition, wherein the forming the mask includes:
forming a layer of the composition on a mask substrate; and
patterning the layer according to a layout design, wherein the patterned layer is operable to absorb a least a portion of the radiation of the wavelength centered around 193 nm.

2. The method of claim 1 , wherein the forming the layer includes determining a thickness of the layer to provide for surface plasmonic polaritons (SPPs) during irradiation of the wavelength centered around 193 nm, and forming the layer of the thickness on the mask substrate.

3. The method of claim 1 , wherein the forming the mask further comprises:
performing an optical proximity correction technique after the determining the composition.

4. The method of claim 3 , wherein the performing the optical proximity correction technique includes modifying an initial layout design to provide the layout design.

5. The method of claim 1 , wherein the forming the mask further comprises:
forming a multi-layer structure including molybdenum-silicon (Mo-Si) multi-layers on the mask substrate, and forming the layer over the multi-layer structure.

6. The method of claim 5 , wherein the forming the mask further comprises:
forming a backside coating on the mask substrate.

7. The method of claim 1 , wherein the determining the composition includes selecting palladium (Pa).

8. The method of claim 1 , wherein the patterning includes forming sidewall surfaces of the layer adjacent a gap.

9. The method of claim 1 , wherein the patterning includes patterning an anti-reflective coating over the layer.

10. The method of claim 1 , wherein the forming the mask further comprises:
depositing a capping layer between the mask substrate and the layer.

11. The method of claim 1 , wherein the determining the composition includes doping a semiconductor composition with an n-type dopant.

12. A method of fabrication, comprising:
receiving a selection of a lithography source having radiation of a wavelength centered around an ultra-violet (UV) wavelength;
determining a composition having a dielectric function with a real part of about −1 at the wavelength;
receive a layout of a semiconductor device; and
forming a mask, wherein the forming the mask includes:
providing a substrate;
forming a plurality of layers over the substrate;
forming a layer of the composition over the plurality of layers, and patterning the layer of the composition according to the layout of the semiconductor device, wherein the patterned layer is operable to absorb at least a portion of the radiation of the wavelength centered around the UV wavelength.

13. The method of claim 12 , wherein the forming the plurality of layers includes forming a multi-layer structure of molybdenum layers and silicon layers.

14. The method of claim 13 , wherein the forming the plurality of layers further comprises forming a capping layer over the multi-layer structure.

15. The method of claim 14 , wherein the capping layer and the multi-layer structure are conformal layers on the substrate.

16. The method of claim 12 , wherein the patterning the layer includes patterning an anti-reflective coating layer over the layer of the composition.

17. A method of semiconductor device fabrication, comprising:
determining a lithography source having radiation of a wavelength;
determining a composition having a dielectric function with a real part of about −1 at the wavelength;
forming a layer of the composition on a mask substrate; and
patterning the layer according to a layout design, wherein the patterned layer is operable upon irradiation with the wavelength with a mixture of transverse electronic (TE) waves and transverse magnetic (TM) waves to suppress the TM waves while reflecting the TE waves.

18. The method of claim 17 , wherein determining the composition includes selecting palladium (Pa).

19. The method of claim 17 , wherein the patterning provides a sidewall of surface of the patterned layer that is operable to form surface plasmonic polaritons (SPP) waves upon irradiation.

20. The method of claim 17 , wherein the determining the composition includes doping a semiconductor composition with an n-type dopant.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chen Minfeng
• Chou Shuo-Yen

Classifications

• H10D89/10 Primary

  Integrated device layouts · CPC title

• G03F1/54 Primary

  Absorbers, e.g. of opaque materials · CPC title

• G03F7/70958

  Optical materials or coatings, e.g. with particular transmittance, reflectance or anti-reflection properties · CPC title

• G03F7/70283

  Mask effects on the imaging process · CPC title

• G03F7/70125

  Use of illumination settings tailored to particular mask patterns (details of setting means G03F7/70091) · CPC title