Vacuum-integrated hardmask processes and apparatus

US11209729B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11209729-B2
Application numberUS-201916691508-A
CountryUS
Kind codeB2
Filing dateNov 21, 2019
Priority dateJan 31, 2014
Publication dateDec 28, 2021
Grant dateDec 28, 2021

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor processing apparatus, comprising: a dry deposition module comprising a reactor chamber for dry depositing an EUV-sensitive organometallic film on a semiconductor substrate; and a dry development module for removing an unexposed portion of a pattern formed in the organometallic film on the substrate by EUV exposure of a portion of the organometallic film; a controller including one or more memory devices, one or more processors and system control software coded with instructions for conducting photoresist-less metal mask formation, the instructions comprising instructions for, in the deposition module, dry depositing the EUV-sensitive organometallic film on a semiconductor substrate; following the dry deposition, transferring under vacuum the substrate to a patterning module comprising an Extreme Ultraviolet (EUV) photolithography tool for EUV lithographic patterning of the organometallic film by exposure of a portion of the organometallic film to EUV radiation, resulting in a pattern of exposed and the unexposed portions in the organometallic film; and in the dry development module, obtaining the semiconductor substrate following EUV lithographic patterning of the organometallic film, and dry developing the pattern in the organometallic film with a non-plasma treatment to remove the unexposed portion of the organometallic film to form a metal-containing hardmask. 2. The apparatus of claim 1 , further comprising vacuum transfer module interfaces connecting the deposition and development modules of the processing apparatus. 3. The apparatus of claim 1 , further comprising the organometallic film patterning module comprising the Extreme Ultraviolet (EUV) photolithography tool with a source of sub-30 nm wavelength radiation. 4. The apparatus of claim 3 , further comprising vacuum transfer module interfaces connecting the deposition, patterning and development modules of the processing apparatus. 5. The apparatus of claim 3 , wherein the EUV photolithography tool source emits radiation having a wavelength in the range of 10 to 20 nm. 6. The apparatus of claim 5 , wherein the EUV photolithography tool source emits radiation having a wavelength of 13.5 nm. 7. The apparatus of claim 1 , wherein the organometallic film is an organotin film. 8. The apparatus of claim 1 , wherein the dry development module further comprises a heater to heat the substrate to volatilize unexposed regions of the organometallic film. 9. A method of processing a semiconductor substrate, comprising: dry depositing an EUV-sensitive an organometallic film on a semiconductor substrate; obtaining EUV lithographic patterning of the organometallic film by exposure of a portion of the organometallic film to EUV radiation, resulting in a pattern of exposed and unexposed portions in the organometallic film; and dry developing the pattern in the organometallic film with a non-plasma treatment to remove the unexposed portion of the organometallic film to form a metal-containing hardmask; wherein the semiconductor substrate is a silicon wafer including partially-formed integrated circuits, and the method further comprising: prior to the deposition, providing the semiconductor substrate in a first reactor chamber for the organometallic film deposition; and following the deposition, transferring the substrate under vacuum to a EUV lithography processing chamber for the patterning. 10. The method of claim 9 , further comprising, prior to entering the EUV lithography processing chamber, outgassing the substrate. 11. The method of claim 9 , wherein the EUV lithography processing chamber has a EUV photolithography source that emits radiation having a wavelength in the range of 10 to 20 nm. 12. The method of claim 11 , wherein the EUV photolithography tool source emits radiation having a wavelength of 13.5 nm. 13. The method of claim 9 , wherein the organometallic film is an organotin film. 14. The method of claim 9 , wherein the dry development of the pattern comprises heating the substrate to volatilize unexposed regions of the organometallic film.

Assignees

Inventors

Classifications

  • characterised by the processes involved to create the masks · CPC title

  • H10P76/405Primary

    characterised by their composition, e.g. multilayer masks · CPC title

  • comprising at least one ion or electron beam chamber · CPC title

  • surrounding a central transfer chamber · CPC title

  • characterised by the layout of the process chambers · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11209729B2 cover?
Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the…
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification H10P76/4085. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 28 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).