Circuit-cycle reproduction

Patent metadata

Field	Value
Publication number	US-11176010-B2
Application number	US-201916384026-A
Country	US
Kind code	B2
Filing date	Apr 15, 2019
Priority date	Apr 15, 2019
Publication date	Nov 16, 2021
Grant date	Nov 16, 2021

Abstract

A circuit-cycle fault reproduction system includes a hardware processor configured to execute at least one computing cycle corresponding to a given number instructions. A cycle tracking unit is configured to identify at least one test cycle included in a range of computing cycles starting from at a start cycle and completing at an end cycle. A fail cycle detection unit is in signal communication with the cycle tracking unit. The fail cycle detection unit is configured to identify a failed cycle among the plurality of test cycles based on a cycle difference between the starting cycle and the ending cycle, and to actively modify the range of computing cycles based on a comparison between the cycle difference and a cycle difference threshold value.

First claim

What is claimed is:

1. A circuit-cycle fault reproduction system comprising:
a hardware processor configured to execute at least one computing cycle corresponding to a given number instructions;
a cycle tracking unit configured to identify at least one test cycle included in a range of computing cycles starting from at a start cycle and completing at an end cycle;
a fail cycle detection unit in signal communication with the cycle tracking unit, the fail cycle detection unit configured to identify a failed cycle among the plurality of test cycles based on a cycle difference between the starting cycle and the ending cycle, and to actively modify the range of computing cycles based on a comparison between the cycle difference and a cycle difference threshold value,
wherein the cycle tracking unit changes one or both of the starting cycle and the ending cycle so as to actively reduce the range of computing cycles.

2. The system of claim 1 , wherein the cycle tracking unit determines a stability factor of the processor, and actively modifies the range of computing cycles based on the stability factor and the comparison between the cycle difference and the cycle difference threshold value.

3. The system of claim 2 , wherein the fail cycle detection unit commands the cycle tracking unit to set a new start cycle in response to the cycle difference exceeding the cycle difference threshold value.

4. The system of claim 3 , wherein cycle tracking unit sets a stability parameter indicating the stability factor, and wherein the fail cycle detection unit commands the cycle tracking unit to set a new start cycle in response to a mismatch between the stability parameter and a stability factor threshold value.

5. The system of claim 4 , wherein the fail cycle detection unit commands the cycle tracking unit to set a new end cycle in response to a match between the stability parameter and a stability factor threshold value.

6. The system of claim 5 wherein the stability factor is determined based on at least one of an operating voltage of the processor, a power consumption of the processor, and a temperature condition of the processor.

7. A computer-implemented method for performing a circuit-cycle fault reproduction process, the method comprising:
executing, via a hardware processor, at least one computing cycle corresponding to a given number instructions;
identifying, via a cycle tracking unit, at least one test cycle included in a range of computing cycles starting from at a start cycle and completing at an end cycle;
actively modifying the range of computing cycles based on a comparison between a cycle difference and a cycle difference threshold value, the cycle difference calculated as a difference value between the starting cycle and the ending cycle; and
identifying, via a fail cycle detection unit, a failed cycle among the range of computing cycles based on a cycle difference,
wherein the cycle tracking unit changes one or both of the starting cycle and the ending cycle so as to actively reduce the range of computing cycles.

8. The computer-implemented method of claim 7 , wherein actively modifying the range of computing cycles comprises changing one or both of the starting cycle and the ending cycle.

9. The computer-implemented method of claim 8 , further comprising:
determining, via the cycle tracking unit, a stability factor of the processor; and
actively modifying the range of computing cycles based on the stability factor and the comparison between the cycle difference and the cycle difference threshold value.

10. The computer-implemented method of claim 9 , wherein actively modifying the range of computing cycles further comprises commanding, via the fail cycle detection unit, the cycle tracking unit to set a new start cycle in response to the cycle difference exceeding the cycle difference threshold value.

11. The computer-implemented method of claim 10 , further comprising:
setting, via the cycle tracking unit, a stability parameter indicating the stability factor; and
commanding the cycle tracking unit to set a new start cycle in response to a mismatch between the stability parameter and a stability factor threshold value.

12. The computer-implemented method of claim 11 , wherein the fail cycle detection unit commands the cycle tracking unit to set a new end cycle in response to a match between the stability parameter and a stability factor threshold value.

13. The computer-implemented method of claim 12 , wherein the stability factor is determined based on at least one of an operating voltage of the processor, a power consumption of the processor, and a temperature condition of the processor.

14. A computer program product for performing a circuit-cycle fault reproduction process, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:
executing, via a hardware processor, at least one computing cycle corresponding to a given number instructions;
identifying, via a cycle tracking unit, at least one test cycle included in a range of computing cycles starting from at a start cycle and completing at an end cycle;
actively modifying the range of computing cycles based on a comparison between a cycle difference and a cycle difference threshold value, the cycle difference calculated as a difference value between the starting cycle and the ending cycle; and
identifying, via a fail cycle detection unit, a failed cycle among the range of computing cycles based on a cycle difference,
wherein the cycle tracking unit changes one or both of the starting cycle and the ending cycle so as to actively reduce the range of computing cycles.

15. The computer program product of claim 14 , further comprising:
determining, via the cycle tracking unit, a stability factor of the processor; and
actively modifying the range of computing cycles based on the stability factor and the comparison between the cycle difference and the cycle difference threshold value.

Assignees

• IBM

Inventors

• Lewis Daniel
• Chinnakkonda Vidyapoornachary Diyanesh B
• Dalton Sean

Classifications

• G06F11/26 Primary

  Functional testing · CPC title

• G06F11/0754

  by exceeding limits · CPC title

• G06F11/2236

  to test CPU or processors · CPC title