Display driving IC and operating method thereof

Patent metadata

Field	Value
Publication number	US-11170683-B2
Application number	US-201916674250-A
Country	US
Kind code	B2
Filing date	Nov 5, 2019
Priority date	Apr 8, 2019
Publication date	Nov 9, 2021
Grant date	Nov 9, 2021

Abstract

An operating method of a display driving integrated circuit (DDIC) includes correcting first image data using correction data in a first operating mode. The first image data is received from a processor via an interface, and the correction data is stored in a first memory included in the DDIC. The method further includes storing second image data received from the processor in the first memory in response to a mode switching signal controlling the DDIC to switch to a second operating mode, and displaying the second image data on a display panel in the second operating mode.

First claim

What is claimed is:

1. An operating method of a display driving integrated circuit (DDIC), the operating method comprising:
correcting first image data using correction data in a first operating mode,
wherein the first image data is received from a processor via an interface, and the correction data is stored in a first memory included in the DDIC in the first operating mode;
storing second image data received from the processor in the same first memory included in the DDIC in a second operating mode, in response to a mode switching signal controlling the DDIC to switch to the second operating mode; and
displaying the second image data on a display panel in the second operating mode.

2. The operating method of claim 1 , further comprising:
updating the second image data with third image data in the second operating mode, wherein the third image data is received from the processor.

3. The operating method of claim 1 , wherein the first image data comprises a plurality of frames, and
the second image data comprises at least one frame, among the plurality of frames, which is not displayed on the display panel.

4. The operating method of claim 1 , further comprising:
deactivating the interface in response to the mode switching signal controlling the DDIC to switch to the second operating mode.

5. The operating method of claim 1 , wherein a frequency of an operating clock for the interface in the second operating mode is lower than a frequency of an operating clock for the interface in the first operating mode.

6. The operating method of claim 1 , further comprising:
changing an operating clock for the interface in response to the mode switching signal controlling the DDIC to switch to the second operating mode.

7. The operating method of claim 1 , further comprising:
copying correction data stored in a second memory disposed outside the DDIC to the first memory, in response to the mode switching signal controlling the DDIC to switch to the first operating mode.

8. The operating method of claim 1 , wherein the correction data comprises bit index information for correcting at least some of bit values included in the first image data.

9. The operating method of claim 1 , wherein a timing controller in the DDIC inputs the first image data to the display panel in response to a timing control signal,
wherein a controller in the DDIC controls whether to activate the interface according to an operating mode of the DDIC,
wherein the timing control signal is received from the processor when the DDIC operates in the first operating mode, and is generated by the controller when the DDIC operates in the second operating mode.

10. An operating method of a display driving integrated circuit (DDIC), the operating method comprising:
receiving first image data and second image data from a processor via an interface;
obtaining correction data stored in an internal memory of the DDIC;
correcting the first image data using the correction data;
displaying the corrected first image data on a display panel; and
deactivating the interface and storing the second image data in the same internal memory instead of the correction data.

11. The operating method of claim 10 , wherein the first image data is received earlier than the second image data.

12. The operating method of claim 10 , further comprising:
displaying the second image data on the display panel under timing control of the DDIC.

13. The operating method of claim 10 , further comprising:
updating the second image data with third image data received from the processor.

14. The operating method of claim 13 , wherein a transmission rate of the third image data is lower than a transmission rate of the first image data and a transmission rate of the second image data.

15. The operating method of claim 10 , further comprising:
storing, in the same internal memory, the correction data stored in an external memory in response to a mode switching signal.

16. The operating method of claim 15 , wherein the mode switching signal changes from logic low to logic high.

17. A display driving integrated circuit (DDIC), comprising:
an interface that communicates with a processor;
a first memory that stores either correction data for correcting image data received from the processor or the image data,
wherein the first memory is connected to the interface;
a timing controller that inputs the image data to a display panel in response to a timing control signal; and
a controller that controls whether to activate the interface according to an operating mode of the DDIC,
wherein the timing control signal is received from the processor when the DDIC operates in a first operating mode, and is generated by the controller when the DDIC operates in a second operating mode.

18. The DDIC of claim 17 , wherein the first memory stores the correction data when the DDIC operates in the first operating mode.

19. The DDIC of claim 17 , wherein the first memory stores the image data when the DDIC operates in the second operating mode.

20. The DDIC of claim 17 , wherein the controller changes an operating clock for the interface when the operating mode of the DDIC is changed.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Han Byung Hun
• Kim Mi Ran

Classifications

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G2360/16

  Calculation or use of calculated indices related to luminance levels in display data · CPC title

• G09G3/20 Primary

  for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

• G09G2310/04

  Partial updating of the display screen · CPC title

• G09G2360/18

  Use of a frame buffer in a display terminal, inclusive of the display panel · CPC title