Multi-tile graphics processor rendering

Patent metadata

Field	Value
Publication number	US-11145105-B2
Application number	US-201916355364-A
Country	US
Kind code	B2
Filing date	Mar 15, 2019
Priority date	Mar 15, 2019
Publication date	Oct 12, 2021
Grant date	Oct 12, 2021

Abstract

Embodiments are generally directed to multi-tile graphics processor rendering. An embodiment of an apparatus includes a memory for storage of data; and one or more processors including a graphics processing unit (GPU) to process data, wherein the GPU includes a plurality of GPU tiles, wherein, upon geometric data being assigned to each of a plurality of screen tiles, the apparatus is to transfer the geometric data to the plurality of GPU tiles.

First claim

What is claimed is:

1. An apparatus comprising:
a memory for storage of data, the data including geometric data for graphics processing, the memory including a distributed data structure; and
one or more processors including a graphics processing unit (GPU) to process data, wherein the GPU includes a plurality of GPU tiles on a substrate, each GPU tile being a separate chiplet, and each GPU tile having a respective tile-based storage;
wherein, upon a respective set of geometric data being assigned to each of a plurality of screen tiles, the apparatus is to transfer the set of geometric data assigned to each of the plurality of screen tiles from the distributed data structure to a tile-based storage of a respective GPU tile of the plurality of GPU tiles, including the apparatus to transfer a first set of geometric data assigned to a first screen tile from the distributed data structure to a tile-based storage of a first GPU tile, and
wherein each set of geometric data is to be processed locally in the respective GPU tile of the plurality of GPU tiles to which the set of geometric data was transferred, including processing the set of first geometric data locally in the first GPU tile.

2. The apparatus of claim 1 , further comprising a display, wherein the apparatus is further to pull geometric data from any GPU tile of the plurality of GPU tiles for the display without consolidating the geometric data of the plurality of GPU tiles.

3. The apparatus of claim 1 , wherein the apparatus is to collect all triangles mapping to one or more screen tiles in a single render pass.

4. The apparatus of claim 1 , further comprising a mesh shader to operate with the plurality of GPU tiles, wherein the mesh shader is to process data from any GPU tile of the plurality of GPU tiles without transfer of data across GPU tiles.

5. The apparatus of claim 4 , wherein the apparatus is to provide tile-based immediate mode rendering (TBIMR) with the mesh shader.

6. The apparatus of claim 4 , further comprising a stream out circuit to read out mesh data from the mesh shader and write the data to memory in a structure of arrays for compression of the mesh data.

7. One or more non-transitory computer-readable storage mediums having stored thereon executable computer program instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising:
assigning a set of geometric data for graphics processing by a graphics processing unit (GPU) of a computing system to each of a plurality of screen tiles, the GPU including a plurality of GPU tiles on a substrate, each GPU tile being a separate chiplet, and each GPU tile having a respective tile-based storage;
transferring each set of geometric data that is assigned to each screen tile of the plurality of screen tiles from a distributed data structure of a memory of the computing system to a tile-based storage of a respective GPU tile of the plurality of GPU tiles of the GPU, including transferring a first set of geometric data assigned to a first screen tile from the distributed data structure to a tile-based storage of a first GPU tile; and
processing each set of geometric data locally in the respective GPU tile of the plurality of GPU tiles to which the set of geometric data was transferred, including processing the set of first geometric data locally in the first GPU tile.

8. The one or more computer-readable storage mediums of claim 7 , further comprising instructions for pulling geometric data from any GPU tile of the plurality of GPU tiles for a display without consolidating the data of the plurality of GPU tiles.

9. The one or more computer-readable storage mediums of claim 7 , further comprising instructions for collecting all triangles mapping to one or more screen tiles in a single render pass.

10. The one or more computer-readable storage mediums of claim 7 , further comprising instructions for processing data from any GPU tile of the plurality of GPU tiles using a mesh shader without transfer of data across GPU tiles.

11. The one or more computer-readable storage mediums of claim 10 , further comprising instructions for providing tile-based immediate mode rendering (TBIMR) with the mesh shader.

12. The one or more computer-readable storage mediums of claim 10 , further comprising instructions for reading out mesh data from the mesh shader and writing the data to memory in a structure of arrays for compression of the mesh data.

13. A method comprising:
assigning a set of geometric data for graphics processing by a graphics processing unit (GPU) of a computing system to each of a plurality of screen tiles, the GPU including a plurality of GPU tiles on a substrate, each GPU tile being a separate chiplet, and each GPU tile having a respective tile-based storage;
transferring each set of geometric data from the that is assigned to each screen tile of the plurality of screen tiles from a distributed data structure of a memory of the computing system to a tile-based storage of a respective GPU tile of the plurality of GPU tiles of the GPU including transferring a first set of geometric data assigned to a first screen tile from the distributed data structure to a tile-based storage of a first GPU tile; and
processing each set of geometric data locally in the respective GPU tile of the plurality of GPU tiles to which the set of geometric data was transferred, including processing the set of first geometric data locally in the first GPU tile.

14. The method of claim 13 , further comprising instructions for pulling geometric data from any GPU tile of the plurality of GPU tiles for a display without consolidating the data of the plurality of GPU tiles.

Assignees

• Intel Corp

Inventors

• Surti Prasoonkumar
• Hunter Jr Arthur
• Sinha Kamal
• Janus Scott
• Insko Brent
• Ranganathan Vasanth
• Striramassarma Lakshminarayanan

Classifications

• G06T17/20

  Finite element generation, e.g. wire-frame surface description, {tesselation} · CPC title

• G06T1/60

  Memory management · CPC title

• G06T15/005 Primary

  General purpose rendering architectures · CPC title

• G06T1/20

  Processor architectures; Processor configuration, e.g. pipelining · CPC title