Techniques for forming interconnects in porous dielectric materials
US-9406615-B2 · Aug 2, 2016 · US
US11094587B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11094587-B2 |
| Application number | US-201515570857-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 3, 2015 |
| Priority date | Jun 3, 2015 |
| Publication date | Aug 17, 2021 |
| Grant date | Aug 17, 2021 |
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In one embodiment, a conductive connector for a microelectronic component may be formed with a noble metal layer, acting as an adhesion/wetting layer, disposed between a barrier liner and a conductive fill material. In a further embodiment, the conductive connector may have a noble metal conductive fill material disposed directly on the barrier liner. The use of a noble metal as an adhesion/wetting layer or as a conductive fill material may improve gapfill and adhesion, which may result in the conductive connector being substantially free of voids, thereby improving the electrical performance of the conductive connector relative to conductive connectors without a noble metal as the adhesion/wetting layer or the conductive fill material.
Opening claim text (preview).
What is claimed is: 1. A microelectronic device structure, comprising: a dielectric material; and a conductive connector within the dielectric material, the conductive connector consisting of: a metal fill material comprising ruthenium; and a second material in contact with the fill material, and in contact with a sidewall of the dielectric material, wherein the second material comprises nitrogen and titanium, tantalum, tungsten, or molybdenum. 2. The microelectronic device structure of claim 1 , wherein the ruthenium has a thickness of between 1 A and 1000 A. 3. The microelectronic device structure of claim 1 , wherein the conductive connector is in direct contact with an underlying conductive land, and wherein a portion of the second material is between the conductive land and the fill material. 4. The microelectronic device structure of claim 3 , wherein the second material is in direct contact with the conductive land. 5. The microelectronic device structure of claim 4 , wherein the conductive land comprises a transistor gate electrode. 6. The microelectronic device structure of claim 5 , wherein the conductive land comprises titanium. 7. The microelectronic device structure of claim 1 , wherein the fill material is a noble metal fill material.
Vias, e.g. via plugs · CPC title
based on metals, e.g. alloys, metal silicides (H10W20/4484 takes precedence) · CPC title
Barrier, adhesion or liner layers · CPC title
for dual-damascene structures · CPC title
the openings being via holes penetrating underlying conductors · CPC title
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