Capacitance sensing circuits
US-2018172744-A1 · Jun 21, 2018 · US
US11092633B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11092633-B2 |
| Application number | US-201916275834-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 14, 2019 |
| Priority date | Feb 16, 2018 |
| Publication date | Aug 17, 2021 |
| Grant date | Aug 17, 2021 |
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A capacitance detection circuit for measuring an electrostatic capacitance, includes: a control signal generator configured to generate a control signal; a drive circuit having a push-pull type output stage and configured to apply a drive voltage to the electrostatic capacitance according to the control signal; a current detection circuit configured to generate a detection current which is a replica of a current flowing through the output stage of the drive circuit; and an integrating circuit configured to integrate the detection current to generate a detection voltage.
Opening claim text (preview).
What is claimed is: 1. A capacitance detection circuit for measuring an electrostatic capacitance, comprising: a control signal generator configured to generate a control signal; a drive circuit including: a push-pull type output stage, which is configured to apply a drive voltage to the electrostatic capacitance according to the control signal, and including a low-side transistor and a high-side transistor; and a differential input stage whose output terminals are connected to a control terminal of the low-side transistor and a control terminal of the high-side transistor, respectively, to apply output voltages to the control terminal of the high-side transistor and the control terminal of the low-side transistor, respectively, so that a feedback signal corresponding to an output voltage of the drive circuit matches the control signal; a current detection circuit configured to generate a detection current which is a replica of a current flowing through the output stage of the drive circuit, and including: a first transistor having a control terminal connected in common with the control terminal of the high-side transistor; and a second transistor having a control terminal connected in common with the control terminal of the low-side transistor; and an integrating circuit configured to integrate the detection current to generate a detection voltage, wherein the detection current depends on a difference between a current flowing through the first transistor and a current flowing through the second transistor. 2. The capacitance detection circuit of claim 1 , wherein the control signal is a pulse signal, and wherein the drive circuit includes an amplifier configured to receive the pulse signal. 3. The capacitance detection circuit of claim 1 , wherein the electrostatic capacitance is obtained by calculating a difference between the detection voltage obtained during charging and the detection voltage obtained during discharging. 4. The capacitance detection circuit of claim 1 , wherein the integrating circuit integrates the detection current obtained during charging and the detection current obtained during discharging. 5. The capacitance detection circuit of claim 1 , further comprising: an offset capacitor having one end connected to an input of the integrating circuit, and the other end to which a correction signal corresponding to the control signal is applied. 6. The capacitance detection circuit of claim 1 , wherein the capacitance detection circuit is integrated on a single semiconductor integrated circuit. 7. The capacitance detection circuit of claim 1 , wherein the differential input stage includes: a non-inverting input terminal to which the control signal, which is a pulse signal, generated by the control signal generator is input; and an inverting input terminal to which the drive voltage is input. 8. A semiconductor device for measuring a plurality of electrostatic capacitances, comprising: a plurality of sense terminals to which the plurality of electrostatic capacitances are connected; and a plurality of capacitance detection circuits corresponding to the plurality of sense terminals, wherein each of the plurality of capacitance detection circuits includes: a control signal generator configured to generate a control signal; a drive circuit including: a push-pull type output stage, which is configured to apply a drive voltage to the electrostatic capacitances according to the control signal, and including a low-side transistor and a high-side transistor; and a differential input stage whose output terminals are connected to a control terminal of the low-side transistor and a control terminal of the high-side transistor, respectively, to apply output voltages to the control terminal of the high-side transistor and the control terminal of the low-side transistor, respectively, so that a feedback signal corresponding to an output voltage of the drive circuit matches the control signal; a current detection circuit configured to generate a detection current which is a replica of a current flowing through the output stage of the drive circuit, and including: a first transistor having a control terminal connected in common with the control terminal of the high-side transistor; and a second transistor having a control terminal connected in common with the control terminal of the low-side transistor; and an integrating circuit configured to integrate the detection current to generate a detection voltage, wherein the detection current depends on a difference between a current flowing through the first transistor and a current flowing through the second transistor. 9. The semiconductor device of claim 8 , further comprising: a current averaging circuit configured to generate an average current of a plurality of detection currents obtained by the plurality of capacitance detection circuits, wherein the integrating circuit of each of the capacitance detection circuits integrates a difference between the corresponding detection current and the average current. 10. An input device comprising: a touch panel including a plurality of sensor electrodes such that the electrostatic capacitances of a portion of the plurality of sensor electrodes in a vicinity of a coordinate touched by a user changes; and the semiconductor device of claim 8 that is configured to measure the electrostatic capacitances of the plurality of sensor electrodes. 11. An electronic apparatus comprising: the input device of claim 10 . 12. The semiconductor device of claim 8 , wherein the differential input stage includes: a non-inverting input terminal to which the control signal, which is a pulse signal, generated by the control signal generator is input; and an inverting input terminal to which the drive voltage is input. 13. A method of detecting an electrostatic capacitance, comprising: generating a control signal; charging and discharging the electrostatic capacitance according to the control signal by using a drive circuit including: a push-pull type output stage, which is configured to apply a drive voltage to the electrostatic capacitance according to the control signal, and including a low-side transistor and a high-side transistor; and a differential input stage whose output terminals are connected to a control terminal of the low-side transistor and a control terminal of the high-side transistor, respectively, to apply output voltages to the control terminal of the high-side transistor and the control terminal of the low-side transistor, respectively, so that a feedback signal corresponding to an output voltage of the drive circuit matches the control signal; generating a detection current which is a replica of a current of the output stage by using a current detection circuit including: a first transistor having a control terminal connected in common with the control terminal of the high-side transistor; and a second transistor having a control terminal connected in common with the control terminal of the low-side transistor; and generating a detection voltage by integrating the detection current, wherein the detection current depends on a difference between a current flowing through the first transistor and a current flowing through the second transistor. 14. The method of claim 13 , wherein the control signal is a pulse signal, and wherein the drive circuit includes an amplifier configured to receive the pulse signal. 15. The method of claim 13 , further comprising: calculating a difference between the detection voltage obtained during charging and the detection voltage obtained
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