Method to predict yield of a device manufacturing process

Patent metadata

Field	Value
Publication number	US-11086229-B2
Application number	US-201816497826-A
Country	US
Kind code	B2
Filing date	Mar 29, 2018
Priority date	May 5, 2017
Publication date	Aug 10, 2021
Grant date	Aug 10, 2021

Abstract

A method and associated computer program for predicting an electrical characteristic of a substrate subject to a process. The method includes determining a sensitivity of the electrical characteristic to a process characteristic, based on analysis of electrical metrology data including electrical characteristic measurements from previously processed substrates and of process metrology data including measurements of at least one parameter related to the process characteristic measured from the previously processed substrates; obtaining process metrology data related to the substrate describing the at least one parameter; and predicting the electrical characteristic of the substrate based on the sensitivity and the process metrology data.

First claim

The invention claimed is:

1. A method for predicting an electrical characteristic of a substrate subject to a process, the method comprising:
determining a sensitivity of the electrical characteristic to a process characteristic, based on analysis of electrical metrology data comprising electrical characteristic measurements taken from previously processed substrates and of process metrology data comprising measurements of at least one parameter related to the process characteristic taken from the previously processed substrates, wherein the determining of the sensitivity of the electrical characteristic to the process characteristic comprises using a function mapping a property of the process metrology data to a property of the electrical metrology data, the property of the process metrology data comprising a fingerprint of the at least one parameter across a substrate, the fingerprint relating different values for the at least one parameter to different regions across at least part of the substrate;
obtaining process metrology data related to locations, on a substrate, associated with a particular relevance for yield of the process, the process metrology data describing the at least one parameter; and
predicting, by a hardware computer system, the electrical characteristic of the substrate at the locations based on the sensitivity and the process metrology data.

2. The method according to claim 1 , wherein the electrical characteristic is associated with a resistance, inductance or capacitance between at least two layers applied during processing of the substrate.

3. The method according to claim 1 , wherein the obtaining process metrology data comprises determining a fingerprint of the at least one parameter based on metrology data.

4. The method according to claim 3 , wherein the at least one parameter comprises a plurality of parameters and the process characteristic is represented by a plurality of fingerprints describing the plurality of parameters across the substrate or part thereof, and a plurality of fingerprints of the parameters are determined for the substrate based on the metrology data.

5. The method according to claim 4 , wherein the plurality of parameters include one or more selected from: an alignment parameter, a leveling parameter, an overlay parameter, a critical dimension parameter after development, and/or a low voltage contrast measurement parameter.

6. The method according to claim 1 , wherein the function is a Pareto chart indicating relative significance of an individual fingerprint of an individual parameter in the determining of the electrical characteristic.

7. The method according to claim 1 , wherein the determining of the sensitivity of the electrical characteristic to the process characteristic further comprises verification of the function based on a comparison of the determined sensitivity with a voltage contrast measurement.

8. The method according to claim 1 , wherein the at least one parameter is associated with ellipticity in the formation of channel holes within a memory stack.

9. The method according to claim 1 , further comprising comparing the predicted electrical characteristic of the substrate to further process metrology data to determine a metrology offset between a nominal optimal parameter value as measured by a metrology device and an actual optimal parameter value which improves or optimizes yield.

10. The method according to claim 1 , further comprising:
determining a yield associated with the process based on the determined electrical characteristic; and
determining a correction to the process based on an expected change of the yield, wherein the expected change of the yield is determined using an expected change of the process characteristic, the sensitivity of the electrical characteristic to the process characteristic, and the determining of the yield based on the determined electrical characteristic.

11. The method of claim 1 , wherein the process metrology data comprises critical dimension and/or overlay data obtained by using a virtual metrology technique.

12. The method of claim 1 , wherein the sensitivity has values spatially defined across at least part of a substrate.

13. A method of determining a value of a control parameter for a process involving lithographic processing of substrates, the method comprising:
obtaining values of the control parameter across a substrate;
obtaining values of a yield parameter across the substrate;
correlating, by a hardware computer system, the values of the yield parameter to the values of the control parameter to obtain a model spatially defined across at least part of a substrate relating control parameter values to expected yield parameter values; and
determining the value of the control parameter based on the model, and an expected margin for the value of the control parameter associated with the process.

14. A computer program product comprising a non-transitory computer-readable medium comprising instructions therein, the instructions, upon execution by a processor system, configured to cause the processor system to at least:
determine a sensitivity of an electrical characteristic of one or more substrates subject to a process to a process characteristic, based on analysis of electrical metrology data comprising electrical characteristic measurements taken from previously processed substrates and of process metrology data comprising measurements of at least one parameter related to the process characteristic taken from the previously processed substrates, wherein the determination of the sensitivity of the electrical characteristic to the process characteristic comprises use of a function mapping a property of the process metrology data to a property of the electrical metrology data, the property of the process metrology data comprising a fingerprint of the at least one parameter across a substrate, the fingerprint relating different values for the at least one parameter to different regions across at least part of the substrate;
obtain process metrology data related to locations, on a substrate, associated with a particular relevance for yield of the process, the process metrology data describing the at least one parameter; and
predict the electrical characteristic of a substrate subject to a process at the critical locations based on the sensitivity and the process metrology data.

15. The computer program product of claim 14 , wherein the electrical characteristic is associated with a resistance, inductance or capacitance between at least two layers applied during processing of the substrate.

16. The computer program product of claim 14 , wherein the instructions are further configured to compare the predicted electrical characteristic of the substrate to further process metrology data to determine a metrology offset between a nominal optimal parameter value as measured by a metrology device and an actual optimal parameter value which improves or optimizes yield.

17. The computer program product of claim 14 , wherein the instructions are further configured to:
determine a yield associated with the process based on the determined electrical characteristic; and
determine a correction to the process based on an expected change of the yield, wherein the expected change of the yield is determined using an expected change of the process characteristic, the sensitivity of the electrical characteristic to the process characteristic, and the determining of the yield based on the determined electrical characteristic.

18. The computer program product of clai

Assignees

• Asml Netherlands Bv

Inventors

• Ypma Alexander
• Tabery Cyrus Emil
• Van Gorp Simon Hendrik Celine
• Lin Chenxi
• Sonntag Dag
• Cekli Hakki Ergün
• Alvarez Sanchez Ruben
• Liu Shih-Chin
• Hastings Simon Philip Spencer
• Menchtchikov Boris
• De Ruiter Christiaan Theodoor
• Ten Berge Peter
• Lercel Michael James
• Duan Wei
• Guittet Pierre-Yves Jerome Yvan

Classifications

• G03F7/706837

  Data analysis, e.g. filtering, weighting, flyer removal, fingerprints or root cause analysis · CPC title

• G03F7/706841

  Machine learning · CPC title

• G03F7/706835 Primary

  Metrology information management or control · CPC title

• G03F7/705 Primary

  Modelling or simulating from physical phenomena up to complete wafer processes or whole workflow in wafer productions · CPC title

• G03F7/706839

  Modelling, e.g. modelling scattering or solving inverse problems · CPC title