Power semiconductor device having a cross-trench arrangement

Patent metadata

Field	Value
Publication number	US-11075290-B2
Application number	US-201916409454-A
Country	US
Kind code	B2
Filing date	May 10, 2019
Priority date	May 29, 2017
Publication date	Jul 27, 2021
Grant date	Jul 27, 2021

Abstract

A power semiconductor device includes an active region surrounded by an inactive termination region each formed by part of a semiconductor body. The active region conducts load current between first and second load terminals. At least one power cell has trenches extending into the semiconductor body adjacent to each other along a first lateral direction and having a stripe configuration that extends along a second lateral direction into the active region. The trenches spatially confine a plurality of mesas each having at least one first type mesa electrically connected to the first load terminal and configured to conduct at least a part of the load current, and at least one second type mesa configured to not conduct the load current. A decoupling structure separates at least one of the second type mesas into a first section in the active region and a second section in the termination region.

First claim

What is claimed is:

1. A power semiconductor device, comprising:
an active gate trench formed in a semiconductor body, the active gate trench separating a first type mesa adjacent a first sidewall of the active gate trench from a second type mesa adjacent a second sidewall of the active gate trench opposite the first sidewall, the first type mesa comprising a source region coupled to an emitter/source potential, the second type mesa being devoid of a source region coupled to the emitter/source potential, the active gate trench being connected to a gate potential and configured to control part of a load current of the power semiconductor device through the first type mesa but not the second type mesa responsive to the gate potential;
a second-type trench formed in the semiconductor body adjacent the second type mesa so that the second type mesa separates the second-type trench from the active gate trench, the second-type trench having a same lengthwise direction as the active gate trench; and
a cross-trench arrangement that extends through the active gate trench, the second type mesa and the second-type trench along a lateral direction which is transverse to the lengthwise direction of the active gate trench and the second-type trench.

2. The power semiconductor device of claim 1 , wherein the cross-trench arrangement separates the first type mesa and the second type mesa each into a first section formed at least by the semiconductor body in an active region of the power semiconductor device and a second section formed at least by the semiconductor body in a termination region which surrounds the active region.

3. The power semiconductor device of claim 2 , wherein the cross-trench arrangement is arranged within a transition region between the active region and the termination region.

4. The power semiconductor device of claim 2 , wherein the first section of the first type mesa and the first section of the second type mesa are connected to each other by a cross-mesa section adjacent to the cross-trench arrangement.

5. The power semiconductor device of claim 4 , wherein the cross-mesa section is formed by a portion of the semiconductor body.

6. The power semiconductor device of claim 4 , wherein the cross-mesa section is interrupted by a portion of a decoupling structure of the cross-trench arrangement, and/or by one or more spacer trench sections, and/or one by or more columnar trenches.

7. The power semiconductor device of claim 6 , wherein the decoupling structure decouples the first type mesa from the second type mesa.

8. The power semiconductor device of claim 2 , wherein the cross-trench arrangement comprises a decoupling structure having spacer trench sections formed by local trench widenings, and wherein the local trench widenings are configured and positioned so as to electrically decouple the first section of the first type mesa and first section of the second type mesa from each other.

9. The power semiconductor device of claim 1 , wherein the first section of the second type mesa is electrically floating, and wherein the first section of the first type mesa has a same electrical potential as a first load terminal of the power semiconductor device.

10. The power semiconductor device of claim 1 , wherein the cross-trench arrangement forms a T junction with the active gate trench and the second-type trench.

11. The power semiconductor device of claim 1 , wherein the cross-trench arrangement comprises an insulating material that extends between the sidewalls and down to a bottom of the active gate trench and the second-type trench.

12. The power semiconductor device of claim 1 , wherein the cross-trench arrangement comprises a cross-trench electrode.

13. The power semiconductor device of claim 12 , wherein the cross-trench electrode is electrically connected to a gate electrode of the active gate trench.

14. The power semiconductor device of claim 12 , wherein the cross-trench electrode is electrically insulated from the electrode in the second-type trench.

15. The power semiconductor device of claim 1 , wherein the cross-trench arrangement extends through the first type mesa along the lateral direction.

16. A power semiconductor device, comprising:
an active gate trench formed in a semiconductor body, the active gate trench separating a first type mesa adjacent a first sidewall of the active gate trench from a second type mesa adjacent a second sidewall of the active gate trench opposite the first sidewall, the first type mesa comprising a source region coupled to an emitter/source potential, the second type mesa being devoid of a source region coupled to the emitter/source potential, the active gate trench being connected to a gate potential and configured to control part of a load current of the power semiconductor device through the first type mesa but not the second type mesa responsive to the gate potential;
a second-type trench different from the active gate trench formed in the semiconductor body adjacent the second type mesa so that the second type mesa separates the second-type trench from the active gate trench, the second-type trench having a same lengthwise direction as the active gate trench;
a source trench having a source electrode electrically connected with a first load terminal of the power semiconductor device, the second-type trench being formed in a semiconductor mesa adjacent to the first type mesa so that the first type mesa separates the source trench from the active gate trench; and
a cross-trench arrangement that extends through the active gate trench, the second type mesa and the second-type trench along a lateral direction which is transverse to the lengthwise direction of the active gate trench and the second-type trench.

17. The power semiconductor device of claim 16 , wherein the cross-trench arrangement separates the first type mesa and the second type mesa each into a first section formed at least by the semiconductor body in an active region of the power semiconductor device and a second section formed at least by the semiconductor body in a termination region which surrounds the active region.

18. The power semiconductor device of claim 16 , wherein the cross-trench arrangement comprises an insulating material that extends between the sidewalls and down to a bottom of the active gate trench and the second-type trench.

Assignees

• Infineon Technologies Ag
• Infineon Tech Dresden Gmbh & Co Kg

Inventors

• Dainese Matteo
• Philippou Alexander
• Bina Markus
• Dirnstorfer Ingo
• Griebl Erich
• Jaeger Christian
• Laven Johannes Georg
• Leendertz Caspar
• Pfirsch Frank Dieter

Classifications

• H10D30/658

  having trench gate electrodes · CPC title

• H10D30/0289

  using recessing of the gate electrodes, e.g. to form trench gate electrodes · CPC title

• H10D62/292

  Non-planar channels of IGFETs (resulting from the gate electrode dispositions, e.g. within trenches H10D64/512) · CPC title

• H10D64/513

  within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title

• H10D30/699

  having the gate at least partly formed in a trench · CPC title