Flux-tunable qubit device with multiple Josephson junctions

Patent metadata

Field	Value
Publication number	US-11070210-B2
Application number	US-202016783603-A
Country	US
Kind code	B2
Filing date	Feb 6, 2020
Priority date	Aug 19, 2016
Publication date	Jul 20, 2021
Grant date	Jul 20, 2021

Abstract

In a general aspect, a qubit device includes two circuit loops. In some aspects, a first circuit loop includes a first Josephson junction, a second circuit loop includes a second Josephson junction, and the first and second loops are configured to receive a magnetic flux that defines a transition frequency of a qubit device. In some aspects, a quantum integrated circuit includes an inductor connected between a first circuit node and a second circuit node; the first Josephson junction connected in parallel with the inductor between the first circuit node and the second circuit node; and the second Josephson junction connected in parallel with the inductor between the first circuit node and the second circuit node.

First claim

What is claimed is:

1. A quantum computing method for-operating a quantum circuit system comprising a first qubit device and a second qubit device, the first qubit device comprising:
an inductor connected between a first circuit node and a second circuit node;
a first Josephson junction connected in parallel with the inductor between the first circuit node and the second circuit node; and
a second Josephson junction connected in parallel with the inductor between the first circuit node and the second circuit node,
the method comprising applying a quantum logic gate to a pair of qubits defined by the first and second qubit devices, wherein applying the quantum logic gate comprises:
parking a qubit frequency of the first qubit device at a parking frequency 1 GHz or more from a qubit frequency of the second qubit device;
tuning the qubit frequency of the first qubit device towards the qubit frequency of the second qubit device;
allowing a coupling of the first and second qubit devices to evolve for a predetermined time period; and
tuning the qubit frequency of the first qubit device back to the parking frequency.

2. A quantum computing system comprising:
a quantum circuit system comprising:
a first qubit device comprising a first superconducting quantum interference device (SQUID) loop and a second SQUID loop, wherein the first and second SQUID loops are configured to receive a magnetic flux that defines a qubit frequency of the first qubit device; and
a second qubit device; and

a control system communicably coupled to the quantum circuit system, the control system configured to apply a quantum logic gate to a pair of qubits defined by the first and second qubit devices, wherein applying the quantum logic gate comprises:
parking a qubit frequency of the first qubit device at a parking frequency 1 GHz or more from a qubit frequency of the second qubit device;
tuning the qubit frequency of the first qubit device towards the qubit frequency of the second qubit device;
allowing a coupling of the first and second qubit devices to evolve for a predetermined time period; and
tuning the qubit frequency of the first qubit device back to the parking frequency.

3. The quantum computing system of claim 2 , wherein the first and second SQUID loops are configured such that the qubit frequency of the first qubit device as a function of the magnetic flux comprises a maximum, a minimum and a flux sweet spot between the maximum and the minimum.

4. The quantum computing system of claim 2 , comprising a chip that includes the first qubit device and a readout resonator coupled to the first qubit device.

5. The quantum computing system of claim 2 , wherein the first SQUID loop include a first Josephson junction, the second SQUID loop includes a second Josephson junction and at least one of the first SQUID loop or the second SQUID loop includes a superinductor.

6. The quantum computing system of claim 5 , wherein:
the first SQUID loop includes the first Josephson junction and the second Josephson junction; and
the second SQUID loop includes the superinductor and the second Josephson junction.

7. The quantum computing system of claim 5 , wherein:
the first SQUID loop includes the first Josephson junction and the superinductor; and
the second SQUID loop includes the second Josephson junction and the superinductor.

8. The quantum computing system of claim 2 , comprising:
a signal delivery system connected to the quantum circuit system and configured to communicate signals between the quantum circuit system and the control system.

9. The quantum computing system of claim 2 , wherein the quantum logic gate is a SWAP gate.

10. The quantum computing method of claim 9 , wherein the SWAP gate is an iSWAP gate, the predetermined time period (t) and a coupling strength (g) between the first and second qubit devices are related such that t=π/2 g.

11. The quantum computing method of claim 1 , wherein the quantum logic gate is a SWAP gate.

12. The quantum computing method of claim 11 , wherein the SWAP gate is an iSWAP gate, the predetermined time period (t) and a coupling strength (g) between the first and second qubit devices are related such that t=π/2 g.

13. The quantum computing method of claim 1 , wherein the first qubit device comprises a first flatsonium qubit device, the second qubit device comprises a second flatsonium qubit device, and applying the quantum logic gate comprises operating the first flatsonium qubit device and the second flatsonium qubit device.

14. The quantum computing method of claim 1 , wherein the first qubit device comprises a flatsonium qubit device, the second qubit device comprises a transmon qubit device, and applying the quantum logic gate comprises operating the flatsonium qubit device and the transmon qubit device.

15. The quantum computing method of claim 1 , wherein the first qubit device comprises a flatsonium qubit device, the second qubit device comprises a fluxonium qubit device, and applying the quantum logic gate comprises operating the flatsonium qubit device and the fluxonium qubit device.

Assignees

• Rigetti & Co Inc

Inventors

• Reagor Matthew J
• Rigetti Chad Tyler
• Sete Eyob A

Classifications

• G06N10/40

  Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title

• G06N10/20

  Models of quantum computing, e.g. quantum circuits or universal quantum computers · CPC title

• H03K19/195 Primary

  using superconductive devices · CPC title

• G06N10/00

  Quantum computing, i.e. information processing based on quantum-mechanical phenomena · CPC title