Reciprocal quantum logic comparator for qubit readout

Patent metadata

Field	Value
Publication number	US-9355364-B2
Application number	US-201414202724-A
Country	US
Kind code	B2
Filing date	Mar 10, 2014
Priority date	Mar 10, 2014
Publication date	May 31, 2016
Grant date	May 31, 2016

Abstract

One aspect of the present invention includes a reciprocal quantum logic (RQL) readout system. The system includes an input stage on which a read pulse is provided and an output stage configured to propagate an output pulse. The system also includes an RQL comparator comprising a first Josephson junction and a second Josephson junction that are coupled to a qubit. A bias current switches between a first Josephson junction in a first quantum state of the qubit and a second Josephson junction in a second quantum state of the qubit. The first Josephson junction triggers to provide the output pulse on the output stage in the first quantum state in response to the read pulse and the second Josephson junction triggers to provide no output pulse on the output stage in the second quantum state in response to the read pulse.

First claim

What is claimed is:

1. A reciprocal quantum logic (RQL) readout system comprising:
an input stage on which a read pulse is provided;
an output stage configured to propagate an output pulse; and
an RQL comparator comprising a first Josephson junction and a second Josephson junction that are coupled to a qubit, such that a bias current switches between a first Josephson junction in a first quantum state of the qubit and a second Josephson junction in a second quantum state of the qubit, such that the first Josephson junction triggers to provide the output pulse on the output stage in the first quantum state in response to the read pulse and the second Josephson junction triggers to provide no output pulse on the output stage in the second quantum state in response to the read pulse.

2. The system of claim 1 , further comprising an RQL clock configured to generate an RQL clock signal, wherein the read pulse is provided on a first cycle of the RQL clock signal and a negative pulse is provided on a second cycle of the RQL clock signal.

3. The system of claim 2 , wherein the RQL clock is configured to provide the RQL clock signal to the input stage to facilitate triggering of at least one input Josephson junction to propagate the read pulse, to provide the RQL clock signal to the output stage to facilitate triggering of at least one output Josephson junction to propagate the output pulse in response to the read pulse in the first quantum state of the qubit, and to provide the RQL clock signal to the RQL comparator to facilitate triggering of one of the first and second Josephson junctions based on the respective one of the first and second quantum states of the qubit.

4. The system of claim 2 , wherein the RQL clock signal is provided to the input stage, the output stage, and the RQL comparator in a symmetrical manner, and wherein the qubit is substantially isolated from the RQL clock signal via at least one inductive coupling.

5. The system of claim 1 , wherein the qubit is inductively coupled to the RQL comparator to generate the bias current that flows through each of the first and second Josephson junctions in a first direction in the first quantum state and in a second direction in the second quantum state, the bias current being provided to change a relative threshold associated with each of the first and second Josephson junctions with respect to the read pulse.

6. The system of claim 5 , wherein the bias current through the first Josephson junction in the first direction is added to the read pulse to trigger the first Josephson junction to generate the output pulse and the bias current through the second Josephson junction in the first direction is subtracted from the read pulse to prevent the second Josephson junction from triggering, and wherein the bias current through the first Josephson junction in the second direction is subtracted from the read pulse to prevent triggering of the first Josephson junction and the bias current through the second Josephson junction in the second direction is added to the read pulse to trigger the second Josephson junction.

7. The system of claim 1 , wherein the RQL comparator further comprises a third Josephson junction and a fourth Josephson junction, wherein the first and second Josephson junctions are coupled to the output stage and wherein the third and fourth Josephson junctions are coupled to the input stage to substantially balance the RQL comparator, and wherein the qubit is inductively coupled to the input stage and to the output stage to generate the bias current through the first, second, third, and fourth Josephson junctions in a first direction in the first quantum state and in a second direction in the second quantum state.

8. The system of claim 7 , further comprising an RQL clock configured to generate an RQL clock signal that is provided symmetrically with respect to the first and second Josephson junctions and the third and fourth Josephson junctions, wherein the read pulse is substantially synchronized with a first cycle of the RQL clock signal.

9. The system of claim 1 , wherein the RQL comparator comprises a shunt resistor that symmetrically interconnects an RQL clock signal and the RQL comparator, such that the shunt resistor is symmetrically arranged with respect to the qubit.

10. The system of claim 1 , wherein the qubit is a phase qubit.

11. A method for reading a quantum state of a phase qubit, the method comprising:
providing a bias current through a first Josephson junction and a second Josephson junction in a first direction in a first quantum state of the phase qubit and in a second direction in a second quantum state of the phase qubit;
applying a read pulse at a first cycle of an RQL clock signal, the read pulse being propagated on an input stage to the first and second Josephson junctions;
determining whether the phase qubit is in the first quantum state based on receiving an output pulse at an output stage in response to the first Josephson junction triggering based on the bias current being provided in the first direction and the read pulse, or in the second quantum state based on not receiving output pulse at the output stage in response to the second Josephson junction triggering based on the bias current being provided in the second direction and the read pulse.

12. The method of claim 11 , further comprising:
providing the RQL clock signal to the input stage to facilitate triggering of at least one input Josephson junction to propagate the read pulse;
providing the RQL clock signal to the output stage to facilitate triggering of at least one output Josephson junction to propagate the output pulse in response to the read pulse in the first quantum state of the qubit; and
providing the RQL clock signal to the RQL comparator to facilitate triggering of one of the first and second Josephson junctions based on the respective one of the first and second quantum states of the qubit.

13. The method of claim 11 , wherein providing the bias current comprises providing the bias current based on an inductive coupling of the phase qubit to the first and second Josephson junctions.

14. The method of claim 11 , wherein providing the bias current comprises:
providing the bias current in the first direction to decrease a threshold of the first Josephson junction relative to the second Josephson junction; and
providing the bias current in the second direction to decrease a threshold of the second Josephson junction relative to the first Josephson junction.

15. The method of claim 11 , wherein providing the bias current comprises:
adding the bias current in the first direction through the first Josephson junction to the read pulse to trigger the first Josephson junction to generate the output pulse at the output stage; and
subtracting the bias current in the second direction through the first Josephson junction from the read pulse to substantially prevent triggering of the first Josephson junction.

16. A reciprocal quantum logic (RQL) readout system comprising:
an RQL clock configured to generate an RQL clock signal;
an input stage along which a read pulse is propagated via at least one input Josephson junction, the read pulse being provided on a first cycle of the RQL clock signal;
an output stage configured to propagate an output pulse via at least one output Josephson junction during the first cycle of the RQL clock signal; and
an RQL comparator comprising a first Josephson junction and a second Josephson junction that are inductively coupled to a phase qubit and a shunt resistor that is arranged symmetrically with respect to the

Assignees

• Miller Donald L
• Naaman Ofer
• Northrop Grumman Systems Corp

Inventors

• Miller Donald L
• Naaman Ofer

Classifications

• G11C11/44

  using super-conductive elements, e.g. cryotron · CPC title

• H03K19/195 Primary

  using superconductive devices · CPC title

• H03K3/38

  by the use, as active elements, of superconductive devices · CPC title

• G06N10/40

  Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title

• H01L39/223

  Electricity · mapped topic