Performing a calibration process in a quantum computing system
US-12591800-B2 · Mar 31, 2026 · US
This page is not indexed by search engines while we improve data quality.
Sete Eyob A patents
Sete Eyob A is listed as an inventor on 56 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Sete Eyob A |
| Total patents | 56 |
| First publication | Aug 10, 2017 |
| Latest publication | Mar 31, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Microwave integrated quantum circuits with cap wafer and methods for making the same
US-12547916-B1 · Feb 10, 2026 · US
Quantum error-correction in microwave integrated quantum circuits
US-12510586-B1 · Dec 30, 2025 · US
Voltage-assisted annealing to alter tunnel junction properties
US-12514136-B2 · Dec 30, 2025 · US
Controlling a tunable floating coupler device in a superconducting quantum processing unit
US-12511567-B2 · Dec 30, 2025 · US
Quantum State Transfer between Nodes in Computing Network
US-2025292134-A1 · Sep 18, 2025 · US
Voltage-Assisted Annealing to Alter Tunnel Junction Properties
US-2025204275-A1 · Jun 19, 2025 · US
Performing a Calibration Process in a Quantum Computing System
US-2025045618-A1 · Feb 6, 2025 · US
Parametrically Activated Quantum Logic Gates
US-2024364345-A1 · Oct 31, 2024 · US
Calibration of iSWAP Gate on a Superconducting Quantum Processing Unit
US-2024311671-A1 · Sep 19, 2024 · US
Recent patents
Latest publications not already listed above.
Parametrically activated quantum logic gates
US-11990905-B1 · May 21, 2024 · US
Quantum error-correction in microwave integrated quantum circuits
US-11977113-B1 · May 7, 2024 · US
Performing a calibration process in a quantum computing system
US-11977956-B2 · May 7, 2024 · US
Parametrically Activated Quantum Logic Gates
US-2024146307-A1 · May 2, 2024 · US
Hardware-Optimized Parity-check (HOP) Gates for Superconducting Surface Codes
US-2024112060-A1 · Apr 4, 2024 · US
Applying Two-qubit Quantum Logic Gates in a Superconducting Quantum Processing Unit
US-2023409942-A1 · Dec 21, 2023 · US
Performing a Calibration Process in a Quantum Computing System
US-2023394342-A1 · Dec 7, 2023 · US
Parametrically activated quantum logic gates
US-11677402-B2 · Jun 13, 2023 · US
Performing a calibration process in a quantum computing system
US-11593698-B2 · Feb 28, 2023 · US
Microwave integrated quantum circuits with vias and methods for making the same
US-11574230-B1 · Feb 7, 2023 · US
Quantum error-correction in microwave integrated quantum circuits
US-11573259-B1 · Feb 7, 2023 · US
Controlling a Tunable Floating Coupler Device in a Superconducting Quantum Processing Unit
US-2022414517-A1 · Dec 29, 2022 · US
Parametrically Activated Quantum Logic Gates
US-2022231690-A1 · Jul 21, 2022 · US
Quantum error-correction in microwave integrated quantum circuits
US-11307242-B1 · Apr 19, 2022 · US
Performing a Calibration Process in a Quantum Computing System
US-2022092461-A1 · Mar 24, 2022 · US
Quantum logic control pulse determination
US-11164103-B2 · Nov 2, 2021 · US
Parametrically activated quantum logic gates
US-11108398-B2 · Aug 31, 2021 · US
Flux-tunable qubit device with multiple Josephson junctions
US-11070210-B2 · Jul 20, 2021 · US
Performing a Calibration Process in a Quantum Computing System
US-2021056454-A1 · Feb 25, 2021 · US
Quantum error-correction in microwave integrated quantum circuits
US-10852346-B1 · Dec 1, 2020 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Rigetti & Co Inc | 36 |
| Rigetti & Co Llc | 24 |
| Goldman Sachs & Co Llc | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06N10/40 | 49 |
| G06N10/20 | 47 |
| G06N10/00 | 36 |
| G06N10/70 | 33 |
| H03K19/195 | 32 |