Insulated gate semiconductor device having trench termination structure and method
US-2019115436-A1 · Apr 18, 2019 · US
US11056484B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11056484-B2 |
| Application number | US-201916533958-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 7, 2019 |
| Priority date | Oct 18, 2018 |
| Publication date | Jul 6, 2021 |
| Grant date | Jul 6, 2021 |
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A semiconductor device includes an IGBT region extending from a front surface to a rear surface of a semiconductor substrate including a first conductive type drift layer, and a diode region lying adjacent to the IGBT region. The IGBT region includes a second conductive type base layer on a side facing the front surface and a first trench portion penetrating the base layer. The first trench portion includes a first gate electrode, a second gate electrode provided directly below the first gate electrode, and an insulating film provided on a side surface of the first gate electrode, between the first gate electrode and the second gate electrode and in a position to contact the second gate electrode. The diode region includes a second conductive type anode layer and a second trench portion including a dummy gate electrode on the side facing the front surface.
Opening claim text (preview).
The invention claimed is: 1. A semiconductor device comprising: an IGBT region extending from a front surface to a rear surface of a semiconductor substrate including a first conductive type drift layer; and a diode region extending from the front surface to the rear surface of the semiconductor substrate and lying adjacent to the IGBT region, wherein the IGBT region comprises a second conductive type base layer formed on a side facing the front surface and a first trench portion provided to penetrate the base layer, the first trench portion comprises a first gate electrode of which a lower end lies above a lower end of the base layer, a second gate electrode provided directly below the first gate electrode, and an insulating film provided on a side surface of the first gate electrode, between the first gate electrode and the second gate electrode, and on a side surface and a lower end portion of the second gate electrode, the diode region comprises a second conductive type anode layer formed on a side facing the front surface and a second trench portion including a dummy gate electrode formed on the side facing the front surface, and wherein the lower end of the first gate electrode is formed further upwards by less than 0.3 μm than the lower end of the base layer. 2. The semiconductor device according to claim 1 , comprising: a first electrode pad electrically connected to the first gate electrode and provided on the semiconductor substrate; and a second electrode pad electrically connected to the second gate electrode and provided on the semiconductor substrate. 3. The semiconductor device according to claim 1 , wherein an upper end of the second gate electrode lies further upwards than the lower end of the base layer. 4. The semiconductor device according to claim 1 , wherein the dummy gate electrode comprises a first dummy gate electrode and a second dummy gate electrode provided directly below the first dummy gate electrode, and wherein the second trench portion comprises a diode region insulating film provided on a side surface of the first dummy gate electrode, between the first dummy gate electrode and the second dummy gate electrode, and on a side surface and a lower end portion of the second dummy gate electrode. 5. The semiconductor device according to claim 1 , comprising a first conductive type carrier storage layer provided underneath the base layer, the carrier storage layer having a higher impurity concentration than an impurity concentration of the semiconductor substrate. 6. The semiconductor device according to claim 1 , wherein a thickness of the insulating film is determined based on dielectric breakdown field strength of the insulating film in relation to a potential difference between the first gate electrode and the second gate electrode. 7. The semiconductor device according to claim 1 , wherein the second gate electrode faces the base layer via the insulating film. 8. A semiconductor device comprising: an IGBT region extending from a front surface to a rear surface of a semiconductor substrate including a first conductive type drift layer; and a diode region extending from the front surface to the rear surface of the semiconductor substrate and lying adjacent to the IGBT region, wherein the IGBT region comprises a second conductive type base layer formed on a side facing the front surface and a first trench portion provided to penetrate the base layer, the first trench portion comprises a first gate electrode, a second gate electrode provided directly below the first gate electrode, and an insulating film provided on a side surface of the first gate electrode, between the first gate electrode and the second gate electrode, and on a side surface and a lower end portion of the second gate electrode, an upper end of the second gate electrode lies further upwards than a lower end of the base layer, and a lower end of the first gate electrode is formed further upwards by less than 0.3 μm than the lower end of the base layer. 9. The semiconductor device according to claim 8 , wherein the diode region comprises a second conductive type anode layer formed on a side facing the front surface and a second trench portion including a dummy gate electrode formed on the side facing the front surface.
within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title
Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes · CPC title
Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127) · CPC title
Base regions of bipolar transistors, e.g. BJTs or IGBTs · CPC title
having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs · CPC title
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