Power amplifier system

Patent metadata

Field	Value
Publication number	US-11038472-B2
Application number	US-201916416816-A
Country	US
Kind code	B2
Filing date	May 20, 2019
Priority date	May 20, 2019
Publication date	Jun 15, 2021
Grant date	Jun 15, 2021

Abstract

A power amplifier system having a power amplifier with a signal input and a signal output and bias circuitry is disclosed. The bias circuitry includes a bandgap reference circuit coupled between a reference node and a fixed voltage node. A bias generator has a bias input coupled to the reference node and a bias output coupled to the signal input. Also included is a first digital-to-analog converter having a first converter output coupled to the reference node, a first voltage input, and a first digital input, wherein the first digital-to-analog converter is configured to adjust a reference voltage at the reference node in response to a first digital setting received at the first digital input. The first digital setting correlates with an indication of temperature of the power amplifier.

First claim

What is claimed is:

1. A power amplifier system comprising:
a power amplifier having a signal input and a signal output;
bias circuitry comprising:
a bandgap reference circuit coupled between a reference node and a fixed voltage node; and
a bias generator having a bias input coupled to the reference node and a bias output coupled to the signal input;

a first digital-to-analog converter having a first analog output coupled to the reference node, a first analog input, and a first digital input, wherein the first digital-to-analog converter is configured to adjust a reference voltage at the reference node in response to a first digital setting received at the first digital input; and
a controller comprising:
a communication port in communication with the first digital input of the first digital-to-analog converter; and
a digital processor in communication with the communication port, wherein the digital processor is configured to:
receive a current indication of temperature of the power amplifier through the communication port;
generate the first digital setting correlating with the current indication of temperature of the power amplifier; and
send the first digital setting through the communication port to the first digital input of the first digital-to-analog converter.

2. The power amplifier system of claim 1 further comprising a look-up table having a list of data entries indicative of temperatures expected to be experienced by the power amplifier versus first digital settings for the first digital-to-analog converter, wherein the look-up table is in communication with the digital processor and the digital processor is further configured to retrieve from the look-up table the first digital setting corresponding to the current indication of temperature of the power amplifier.

3. The power amplifier system of claim 2 further comprising a second digital-to-analog converter having a second analog output coupled to the first analog input, a second analog input coupled to a fixed voltage node, and a second digital input, wherein the second digital-to-analog converter is configured to adjust a voltage at the first analog input in response to a second digital setting received at the second digital input.

4. The power amplifier system of claim 3 wherein the look-up table further includes second digital settings for the second digital-to-analog converter corresponding with the list of data entries indicative of temperatures expected to be experienced by the power amplifier, and wherein the digital processor is further configured to retrieve from the look-up table the second digital setting corresponding to the current indication of temperature of the power amplifier.

5. The power amplifier system of claim 4 wherein the list of data entries indicative of temperatures expected to be experienced by the power amplifier comprises power level settings for the power amplifier.

6. The power amplifier system of claim 4 wherein the power amplifier and bias circuitry are integrated in an integrated circuit.

7. The power amplifier system of claim 6 further comprising:
an analog-to-digital converter having a digital output coupled to the communication port and a sensor input; and
a temperature sensor integrated in the integrated circuit and a sensor output coupled to the sensor input, wherein the analog-to-digital converter is configured to convert an analog temperature generated by the temperature sensor to a digital temperature reading that is sent from the digital output to the communication port as the indication of the current temperature of the power amplifier.

8. The power amplifier system of claim 6 wherein the first digital-to-analog converter and the second digital-to-analog converter are integrated with the power amplifier and bias circuitry in the integrated circuit.

9. The power amplifier system of claim 7 wherein the first digital-to-analog converter, the second digital-to-analog converter, and the temperature sensor are integrated with the power amplifier and bias circuitry in the integrated circuit.

10. The power amplifier system of claim 1 wherein the first digital-to-analog converter has a variable resistance between the first analog input and the first analog output, wherein the variable resistance is controlled by the first digital-to-analog converter in response to the first digital setting received at the first digital input.

11. The power amplifier system of claim 3 wherein the second digital-to-analog converter has a variable voltage at the second analog output, wherein the variable voltage is controlled by the second digital-to-analog converter in response to the second digital setting received at the first digital input.

12. The power amplifier system of claim 1 further including a filter capacitor coupled between the reference node and ground.

13. The power amplifier system of claim 1 further including a coupling capacitor coupled between a radio frequency input and the signal input of the power amplifier.

14. The power amplifier system of claim 1 wherein a gain of the power amplifier remains within ±1 dB over a temperature range between −40° C. and 140° C.

15. The power amplifier system of claim 1 wherein the power amplifier is based on bipolar junction transistor technology.

16. The power amplifier system of claim 1 wherein the bandgap reference circuit comprises a pair of stacked transistors that are each in a diode configuration coupled between the reference node and the fixed voltage node.

17. The power amplifier system of claim 1 wherein the fixed voltage node is ground.

18. The power amplifier system of claim 1 wherein the bias generator comprises a bipolar junction transistor having a base coupled to the bias input and an emitter coupled to the signal input of the power amplifier.

19. The power amplifier system of claim 18 wherein the bias generator further comprises a resistor coupled between the emitter and the signal input of the power amplifier.

Assignees

• Qorvo Us Inc

Inventors

• Scott Baker
• Maxim George
• Moriuchi Toshiaki
• Leipold Dirk Robert Walter

Classifications

• H03F2200/447

  the amplifier being protected to temperature influence · CPC title

• H03F1/306 Primary

  in junction-FET amplifiers (H03F1/303, H03F1/305, H03F1/309 take precedence) · CPC title

• H03F1/302

  in bipolar transistor amplifiers (H03F1/303, H03F1/305, H03F1/307 take precedence) · CPC title

• H03G2201/708

  being temperature · CPC title

• H03F3/245

  with semiconductor devices only · CPC title