Operational amplifier

Patent metadata

Field	Value
Publication number	US-11316480-B2
Application number	US-202016904506-A
Country	US
Kind code	B2
Filing date	Jun 17, 2020
Priority date	Aug 27, 2019
Publication date	Apr 26, 2022
Grant date	Apr 26, 2022

Abstract

An operational amplifier includes a voltage terminal; a common terminal; a first amplification stage for receiving a differential signal pair to generate a single-end amplification signal; a first buffer for generating a first voltage according to the single-end amplification signal; a first diode for reducing the first voltage to generate a second voltage; a second amplification stage for amplifying the second voltage to generate a third voltage; a voltage stabilizing circuit for stabilizing the third voltage; a second diode coupled between the second amplification stage and the common terminal; a second buffer for generating an output voltage according to the third voltage; and a current mirror coupled to the common terminal, the first amplification stage, the first diode and the second amplification stage.

First claim

What is claimed is:

1. An operational amplifier comprising:
a voltage terminal configured to provide a supply voltage;
a common terminal configured to provide a common voltage;
a first amplification stage coupled to the voltage terminal, the first amplification stage comprising a transistor pair and configured to receive a differential signal pair to generate a single-ended amplification signal;
a first buffer coupled to the first amplification stage and the voltage terminal and configured to generate a first voltage according to the single-ended amplification signal;
a first diode circuit coupled between the first buffer and the common terminal and configured to down-convert the first voltage to generate a second voltage;
a second amplification stage comprising a second amplification transistor, the second amplification stage being coupled to the first diode circuit and configured to amplify the second voltage to generate a third voltage;
a stabilizing circuit coupled between the first diode circuit and the second amplification stage, the stabilizing circuit comprising a resistor and a capacitor coupled in series to each other and configured to stabilize the third voltage;
a second diode circuit coupled between the second amplification stage and the common terminal;
a second buffer coupled to the second amplification stage and configured to generate an output voltage according to the third voltage; and
a current mirror circuit coupled to the common terminal, the first amplification stage, the first diode circuit and the second buffer.

2. The operational amplifier of claim 1 , further comprising a feedforward capacitor having a first terminal coupled to the first buffer, and a second terminal coupled to a second terminal of the first diode circuit.

3. The operational amplifier of claim 1 , further comprising a first phase adjustment circuit coupled between the first amplification stage and the common terminal and configured to adjust a phase of the single-ended amplification signal.

4. The operational amplifier of claim 3 , wherein the first phase adjustment circuit comprises:
a first resistor comprising:
a first terminal coupled to the first amplification stage and the first buffer; and
a second terminal; and

a first capacitor comprising:
a first terminal coupled to the second terminal of the first resistor; and
a second terminal coupled to the common terminal.

5. The operational amplifier of claim 1 , further comprising a second phase adjustment circuit coupled between the second amplification stage and the common terminal and configured to adjust a phase of the third voltage.

6. The operational amplifier of claim 5 , wherein the second phase adjustment circuit comprises:
a second resistor comprising:
a first terminal coupled to the second amplification stage, the stabilizing circuit and the second buffer; and
a second terminal; and

a second capacitor comprising:
a first terminal coupled to the second terminal of the second resistor; and
a second terminal coupled to the common terminal.

7. The operational amplifier of claim 1 , wherein:
the current mirror circuit comprises a first transistor, a second transistor, a third transistor and a fourth transistor; and
the first transistor is coupled in a diode configuration and coupled to the second transistor, the third transistor and the fourth transistor to form current mirrors and adjust currents flowing through the first amplification stage, the first diode circuit and the second buffer, respectively.

8. The operational amplifier of claim 7 , wherein the first transistor, the second transistor, the third transistor and the fourth transistor are enhancement-mode pseudomorphic high electron mobility transistors (E-pHEMT) or NPN-type bipolar junction transistors (BJT).

9. The operational amplifier of claim 1 , wherein the first buffer comprises a first emitter follower or a first source follower, and the second buffer comprises a second emitter follower or a second source follower.

10. The operational amplifier of claim 9 , wherein the first buffer and the second buffer are enhancement-mode pseudomorphic high electron mobility transistors.

11. The operational amplifier of claim 1 , wherein the first buffer is an enhancement-mode pseudomorphic high electron mobility transistor, and the second buffer is a depletion-mode pseudomorphic high electron mobility transistor (D-pHEMT).

12. The operational amplifier of claim 1 , wherein the transistor pair and the second amplification transistor are N-type heterojunction bipolar transistors (HBTs).

13. The operational amplifier of claim 1 , wherein the transistor pair and the second amplification transistor are N-type metal semiconductor field effect transistors (MESFETs).

14. The operational amplifier of claim 1 , wherein the transistor pair and the second amplification transistor are pseudomorphic high electron mobility transistors (pHEMTs) or N-type junction gate field-effect transistors (JFETs).

15. The operational amplifier of claim 1 , wherein the operational amplifier only comprises N-type transistors or NPN-type transistors.

16. The operational amplifier of claim 1 , wherein the first diode circuit and the second diode circuit comprise at least one Schottky diode.

17. The operational amplifier of claim 1 , wherein:
the differential signal pair comprises an inverting signal and a non-inverting signal; and
the transistor pair comprises:
a first differential amplification transistor comprising a control terminal configured to receive the non-inverting signal, a first terminal configured to output the single-ended amplification signal, and a second terminal; and
a second differential amplification transistor comprising a control terminal configured to receive the inverting signal, a first terminal, and a second terminal coupled to the second terminal of the first differential amplification transistor.

18. The operational amplifier of claim 1 , wherein:
the first buffer comprises a fifth transistor comprising a first terminal coupled to the voltage terminal, a second terminal coupled to the first terminal of the first diode circuit, and a control terminal configured to receive the single-ended amplification signal; and
a second buffer comprises a sixth transistor comprising a first terminal coupled to the voltage terminal, a second terminal configured to output the output voltage, and a control terminal configured to receive the third voltage.

19. The operational amplifier of claim 1 , wherein:
the first diode circuit comprises a first terminal coupled to the first buffer, and a second terminal coupled to the common terminal; and
the second diode circuit comprises a first terminal coupled to the second amplification transistor, and a second terminal coupled to the common terminal.

20. The operational amplifier of claim 1 , wherein operational amplifier is fabricated using a gallium arsenide (GaAs) process.

Assignees

• Richwave Technology Corp

Inventors

• Chien Hwey-Ching

Classifications

• H03F3/45475

  using IC blocks as the active amplifying circuit · CPC title

• H03F2200/447

  the amplifier being protected to temperature influence · CPC title

• H03F3/45179 Primary

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

• H03F3/45376

  using junction FET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

• H03F3/45282 Primary

  Long tailed pairs (H03F3/45309, H03F3/45336 take precedence) · CPC title