Low-power cached ambient computing

Patent metadata

Field	Value
Publication number	US-11023379-B2
Application number	US-201916518644-A
Country	US
Kind code	B2
Filing date	Jul 22, 2019
Priority date	Feb 13, 2019
Publication date	Jun 1, 2021
Grant date	Jun 1, 2021

Abstract

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for performing a prefetch processing to prepare an ambient computing device to operate in a low-power state without waking a memory device. One of the methods includes performing, by an ambient computing device, a prefetch process that populates a cache with prefetched instructions and data required for the ambient computing device to process inputs to the system while in the low-power state, and entering the low-power state, and processing, by the ambient computing device in the low-power state, inputs to the system using the prefetched instructions and data stored in the cache.

First claim

What is claimed is:

1. A system comprising:
multiple integrated client devices, including an ambient computing device that is configured to control operation of the system while the system is in a low-power state;
a memory controller configured to read data from a memory device for consumption by the client devices; and
a cache configured to cache data requests to the memory controller issued by the ambient computing device, wherein the cache is a system-level cache configured to cache data requests to the memory controller for each of the multiple integrated client devices,
wherein the system is configured to enter the low-power state by performing operations comprising:
performing, by the ambient computing device, a prefetch process that populates the cache with prefetched instructions and data required for the ambient computing device to process inputs to the system while in the low-power state, and
entering the low-power state, wherein in the low-power state, the ambient computing device is configured to process inputs to the system using the prefetched instructions and data.

2. The system of claim 1 , further comprising a local cache that is configured to service memory requests only for the ambient computing device and not for any of the other integrated client devices, and
wherein performing the prefetch process further comprises populating the local cache with a portion of the prefetched instructions.

3. The system of claim 1 , wherein performing the prefetch process increases an amount of SRAM memory available to the ambient computing device during the low-power state.

4. The system of claim 3 , wherein the memory available to the ambient computing device during the low-power state includes an internal SRAM of the ambient computing device and SRAM of the system-level cache.

5. The system of claim 1 , wherein in the low-power state, the ambient computing device is configured to process the inputs to the system using the prefetched instructions and data without waking the memory device or waking the memory controller.

6. The system of claim 1 , wherein performing the prefetch process comprises issuing prefetch store memory requests that allocate cache lines in the cache for data that the ambient computing device will store during the low-power state.

7. The system of claim 6 , wherein the prefetch store memory requests each write dummy data to the cache.

8. The system of claim 1 , wherein the system includes a hierarchy of multiple caches, and wherein entering the low-power state comprises:
determining a memory size for a low-power procedure to be executed by the ambient computing device in the low-power state;
determining, based on the memory size for the low-power procedure to be executed by the ambient computing device in the low-power state, which cache in the hierarchy of multiple caches should be used to store the prefetched instructions and data required for the ambient computing device to process inputs to the system while in the low-power state; and
selecting the system-level cache from among the multiple caches in the hierarchy based on the determination.

9. The system of claim 8 , wherein entering the low-power state further comprises:
powering down all caches that are lower in the hierarchy of caches than the selected cache.

10. The system of claim 9 , wherein entering the low-power state further comprises powering down all data paths to the caches that are lower in the hierarchy of caches than the selected cache.

11. The system of claim 10 , wherein powering down all caches that are lower in the hierarchy of caches than the selected cache comprises powering down a portion of the system-level cache.

12. A method for entering a low-power state by a system comprising:
multiple integrated client devices, including an ambient computing device that is configured to control operation of the system while the system is in the low-power state;
a memory controller configured to read data from a memory device for consumption by the client devices; and
a cache configured to cache data requests to the memory controller issued by the ambient computing device, wherein the cache is a system-level cache configured to cache data requests to the memory controller for each of the multiple integrated client devices,
wherein the method comprises:
performing, by the ambient computing device, a prefetch process that populates the cache with prefetched instructions and data required for the ambient computing device to process inputs to the system while in the low-power state;
entering the low-power state; and
processing, by the ambient computing device in the low-power state, inputs to the system using the prefetched instructions and data stored in the cache.

13. The method of claim 12 , wherein the cache is a local cache that is configured to service memory requests only for the ambient computing device and not for any of the other integrated client devices, and
wherein performing the prefetch process further comprises populating the local cache with a portion of the prefetched instructions.

14. The method of claim 12 , wherein performing the prefetch process increases an amount of SRAM memory available to the ambient computing device during the low-power state.

15. The method of claim 14 , wherein the memory available to the ambient computing device during the low-power state includes an internal SRAM of the ambient computing device and SRAM of the system-level cache.

16. The method of claim 12 , further comprising processing, by the ambient computing device in the low-power state, the inputs to the system using the prefetched instructions and data without waking the memory device or waking the memory controller.

17. The method of claim 12 , wherein performing the prefetch process comprises issuing prefetch store memory requests that allocate cache lines in the cache for data that the ambient computing device will store during the low-power state.

18. The method of claim 12 , wherein the system includes a hierarchy of multiple caches, and wherein entering the low-power state comprises:
determining a memory size for a low-power procedure to be executed by the ambient computing device in the low-power state;
determining, based on the memory size for the low-power procedure to be executed by the ambient computing device in the low-power state, which cache in the hierarchy of multiple caches should be used to store the prefetched instructions and data required for the ambient computing device to process inputs to the system while in the low-power state; and
selecting the system-level cache from among the multiple caches in the hierarchy based on the determination.

19. The method of claim 18 , wherein entering the low-power state further comprises powering down all caches that are lower in the hierarchy of caches than the selected cache.

20. The method of claim 19 , wherein entering the low-power state further comprises powering down all data paths to the caches that are lower in the hierarchy of caches than the selected cache.

Assignees

• Google Llc

Inventors

• Chamarty Vinod
• Madar Iii Lawrence J

Classifications

• G06F1/3215

  Monitoring of peripheral devices · CPC title

• G06F1/3293

  by switching to a less power-consuming processor, e.g. sub-CPU · CPC title

• G06F12/0864

  using pseudo-associative means, e.g. set-associative or hashing · CPC title

• G06F12/0848

  Partitioned cache, e.g. separate instruction and operand caches · CPC title

• H04L67/5681

  Pre-fetching or pre-delivering data based on network characteristics · CPC title