Magnetoresistive random access memory device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-11004900-B2
Application number	US-201916512627-A
Country	US
Kind code	B2
Filing date	Jul 16, 2019
Priority date	Jan 31, 2019
Publication date	May 11, 2021
Grant date	May 11, 2021

Abstract

An MRAM device includes a first conductive pattern including a material generating a spin orbital torque, a torque transfer pattern contacting a portion of an upper surface of the first conductive pattern, an insulation pattern on a side of the torque transfer pattern and covering the first conductive pattern, and a magnetic tunnel junction (MTJ) structure on the torque transfer pattern, the MTJ structure including a free layer pattern, a tunnel barrier pattern, and a fixed layer pattern sequentially stacked.

First claim

What is claimed is:

1. A magnetoresistive random access memory (MRAM) device, comprising:
a first conductive pattern including a material generating a spin orbital torque;
a torque transfer pattern contacting a portion of an upper surface of the first conductive pattern;
an insulation pattern on a side of the torque transfer pattern and covering the first conductive pattern; and
a magnetic tunnel junction (MTJ) structure on the torque transfer pattern, the MTJ structure including a free layer pattern, a tunnel barrier pattern, and a fixed layer pattern sequentially stacked.

2. The MRAM device as claimed in claim 1 , wherein the first conductive pattern includes a horizontal magnetic material.

3. The MRAM device as claimed in claim 1 , wherein the first conductive pattern includes at least one of Pt, Ta, W, Hf, Ir, CuBi, CuIr, and AuW.

4. The MRAM device as claimed in claim 1 , wherein the first conductive pattern has a thickness of about 5 Å to about 100 Å.

5. The MRAM device as claimed in claim 1 , wherein the torque transfer pattern includes a metal having a resistance lower than a resistance of the first conductive pattern.

6. The MRAM device as claimed in claim 1 , wherein the MTJ structure covers an upper surface of the torque transfer pattern.

7. The MRAM device as claimed in claim 6 , wherein a first width of a lower surface of the MTJ structure is equal to or greater than a second width of the upper surface of the torque transfer pattern.

8. The MRAM device as claimed in claim 1 , wherein the insulation pattern includes silicon nitride, silicon oxynitride, or silicon oxide.

9. The MRAM device as claimed in claim 1 , wherein upper surfaces of the torque transfer pattern and the insulation pattern are coplanar with each other.

10. The MRAM device as claimed in claim 1 , wherein the first conductive pattern has a line shape extending in a first direction parallel to the upper surface of the first conductive pattern.

11. The MRAM device as claimed in claim 10 , further comprising a second conductive pattern on the MTJ structure and electrically connected with the fixed layer pattern, the second conductive pattern having a line shape extending in a second direction perpendicular to the first direction and parallel to the upper surface of the first conductive pattern.

12. The MRAM device as claimed in claim 1 , wherein the first conductive pattern has an isolated pattern shape, and a longitudinal direction of the first conductive pattern is a first direction parallel to the upper surface of the first conductive pattern.

13. The MRAM device as claimed in claim 12 , further comprising:
an upper conductive line electrically connected to the first conductive pattern; and
a first transistor electrically connected to the first conductive pattern.

14. The MRAM device as claimed in claim 12 , further comprising a second transistor electrically connected to the fixed layer pattern of the MTJ structure.

15. A magnetoresistive random access memory (MRAM) device, comprising:
a first conductive pattern including a material generating a spin orbital torque;
a torque transfer pattern contacting a portion of an upper surface of the first conductive pattern, the torque transfer pattern protruding in a vertical direction from the upper surface of the first conductive pattern; and
a magnetic tunnel junction (MTJ) structure on the torque transfer pattern, the MTJ structure including a free layer pattern, a tunnel barrier pattern, and a fixed layer pattern sequentially stacked, and the free layer pattern contacting an upper surface of the torque transfer pattern,
wherein a width of the torque transfer pattern in a horizontal direction is smaller than each of a width of the MTJ structure and a width of the first conductive pattern in the horizontal direction.

16. The MRAM device as claimed in claim 15 , wherein the first conductive pattern includes a horizontal magnetic material.

17. The MRAM device as claimed in claim 15 , wherein the torque transfer pattern includes a metal having a resistance lower than a resistance of the first conductive pattern.

18. The MRAM device as claimed in claim 15 , further comprising an insulation pattern on a side of the torque transfer pattern and covering the first conductive pattern.

19. The MRAM device as claimed in claim 18 , wherein the upper surface of the torque transfer pattern and an upper surface of the insulation pattern are coplanar with each other.

20. A magnetoresistive random access memory (MRAM) device, comprising:
a first conductive pattern including a material generating a spin orbital torque;
a torque transfer pattern contacting a portion of an upper surface of the first conductive pattern;
an insulation pattern on a side of the torque transfer pattern and covering the first conductive pattern;
a magnetic tunnel junction (MTJ) structure on the torque transfer pattern, the MTJ structure including a free layer pattern, a tunnel barrier pattern, and a fixed layer pattern stacked, and the torque transfer pattern contacting the free layer pattern; and
a second conductive pattern on the MTJ structure, the second conductive pattern being electrically connected to the fixed layer pattern.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Shin Hee-Ju
• Pi Ung-Hwan

Classifications

• G11C11/161

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• G11C11/15

  using multiple magnetic layers (G11C11/155 takes precedence) · CPC title

• H10B61/22 Primary

  of the field-effect transistor [FET] type · CPC title

• H10B61/20 Primary

  comprising components having three or more electrodes, e.g. transistors · CPC title

• H10N50/85

  Materials of the active region · CPC title