Multiple-mask multiple-exposure lithography and masks

Patent metadata

Field	Value
Publication number	US-10996558-B2
Application number	US-201916658909-A
Country	US
Kind code	B2
Filing date	Oct 21, 2019
Priority date	Jul 31, 2017
Publication date	May 4, 2021
Grant date	May 4, 2021

Abstract

Examples of a multiple-mask multiple-exposure lithographic technique and suitable masks are provided herein. In some examples, a photomask includes a die area and a stitching region disposed adjacent to the die area and along a boundary of the photomask. The stitching region includes a mask feature for forming an integrated circuit feature and an alignment mark for in-chip overlay measurement.

First claim

What is claimed is:

1. A method comprising:
receiving a layout of an integrated circuit that includes functional shapes corresponding to functional features of the integrated circuit;
dividing the layout into a first mask region and a second mask region, wherein a first region of the first mask region overlaps with a second region of the second mask region;
defining a first alignment zone within the first region and a second alignment zone within the second region;
allocating a first alignment shape in the first alignment zone and a second alignment shape within the second alignment zone;
defining a first stitching zone within the first region and a second stitching zone within the second region;
allocating a first functional shape in the first stitching zone and a second functional shape within the second stitching zone;
separating the first mask region from the second mask region; and
fabricating a first mask based on the first mask region such that the first mask includes a first mask feature corresponding to the first functional shape and a first alignment mark corresponding to the first alignment shape.

2. The method of claim 1 , further comprising fabricating a second mask based on the second mask region such that the second mask includes a second mask feature corresponding to the second functional shape and a second alignment mark corresponding to the second alignment shape.

3. The method of claim 2 , further comprising:
performing a first exposure process using the first mask to expose a first portion of a photosensitive material; and
performing a second exposure process using the second mask to expose a second portion of the photosensitive material, wherein the second portion of the photosensitive material overlaps the first portion of the photosensitive material.

4. The method of claim 1 , wherein the allocating of the second functional shape within the second stitching zone includes allocating the first functional shape within the second stitching zone.

5. The method of claim 1 , wherein the first alignment shape includes an outer box of a box-in-box pattern, and
wherein the second alignment shape includes an inner box of the box-in-box pattern.

6. The method of claim 1 , further comprising:
determining whether any functional shape elements are within the first alignment zone; and
removing any function shape elements from the first alignment zone.

7. The method of claim 1 , further comprising:
defining a first frame area within the first mask region; and
allocating a first inter-level alignment shape to the first frame area.

8. A method comprising:
receiving a layout of an integrated circuit that includes functional shapes corresponding to functional features of the integrated circuit;
dividing the layout into a first mask region and a second mask region, wherein a first region of the first mask region overlaps with a second region of the second mask region;
allocating a first alignment shape to the first region and a second alignment shape to the second region;
determining that the layout requires a first functional shape to be allocated to the first region and the second region;
allocating the first functional shape to only the first region after determining that the layout requires the first functional shape to be allocated to the first region and the second region; and
fabricating a first mask based on the first mask region and a second mask based on the second mask region.

9. The method of claim 8 , further comprising:
determining that the layout requires a second functional shape to be allocated to the first region and the second region;
allocating the second functional shape to the first region and the second region.

10. The method of claim 9 , wherein the second functional shape extends to a first die area of the first mask region,
wherein the second functional shape has a first width in the first die area and a second width in the first region that is less than the first width.

11. The method of claim 9 , wherein the second functional shape extends to a second die area of the second mask region,
wherein the second functional shape has a third width in the second die area and a fourth width in the second region that is less than the third width.

12. The method of claim 8 , wherein the allocating of the first alignment shape to the first region and the second alignment shape to the second region includes allocating a third alignment shape to the first region and a fourth alignment shape to the second region, and
wherein the first alignment shape is different than the third alignment shape and the second alignment shape is different than the fourth alignment shape.

13. The method of claim 8 , wherein the first alignment shape includes a feature selected from the group consisting of an inner box alignment feature, an outer box alignment feature, an inner cross alignment feature, an outer cross alignment feature, and a test line.

14. The method of claim 8 , further comprising:
performing a first exposure process using the first mask to expose a first portion of a photosensitive material; and
performing a second exposure process using the second mask to expose a second portion of the photosensitive material, wherein the second portion of the photosensitive material overlaps the first portion of the photosensitive material.

15. The method of claim 8 , further comprising separating the first mask region from the second mask region.

16. A method comprising:
receiving a layout that includes functional shapes corresponding to features of a mask for forming functional features of an integrated circuit;
dividing the layout into a plurality of overlapping mask regions;
defining alignment zones in the layout at boundaries between regions of the plurality of overlapping mask regions;
inserting alignment shapes into the alignment zones;
allocating the functional shapes and the alignment shapes among the plurality of overlapping mask regions; and
providing the plurality of overlapping mask regions for fabricating masks of a multiple-mask multiple-exposure mask set.

17. The method of claim 16 , wherein the alignment shapes are disposed among the functional shapes.

18. The method of claim 16 , wherein the allocating of the alignment shapes includes:
allocating an inner box of a box-in-box pattern to a first region of the plurality of overlapping mask regions; and
allocating an outer box of the box-in-box pattern to a second region of the plurality of overlapping mask regions.

19. The method of claim 16 , wherein:
the allocating of the alignment shapes allocates a first plurality of alignment shapes to a first region of the plurality of overlapping mask regions; and
the first plurality of alignment shapes are arranged in parallel with a boundary of the first region.

20. The method of claim 19 , wherein:
the allocating of the alignment shapes further allocates a second plurality of alignment shapes to the first region; and
the second plurality of alignment shapes are arranged in parallel with the boundary of the first region and are disposed between the first plurality of alignment shapes and the boundary.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Yu Peter
• Hsu Chih-Tung
• Wang Kevin
• Hu Chih-Chia
• Chen Roger

Classifications

• G03F1/42 Primary

  Alignment or registration features, e.g. alignment marks on the mask substrates · CPC title

• G03F7/2022

  Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure · CPC title

• G03F9/7084

  Position of mark on substrate, i.e. position in (x, y, z) of mark, e.g. buried or resist covered mark, mark on rearside, at the substrate edge, in the circuit area, latent image mark, marks in plural levels · CPC title

• G03F7/70683

  Mark designs · CPC title

• G03F9/7076 Primary

  Mark details, e.g. phase grating mark, temporary mark · CPC title