Cantilevered leadframe support structure for magnetic wireless transfer between integrated circuit dies

Patent metadata

Field	Value
Publication number	US-10991641-B2
Application number	US-202016867352-A
Country	US
Kind code	B2
Filing date	May 5, 2020
Priority date	May 12, 2014
Publication date	Apr 27, 2021
Grant date	Apr 27, 2021

Abstract

A coupling device provides galvanic isolation using a leadframe that is configured to support two integrated circuit chips in a coplanar manner. Each chip contains an inductive coupling coil. The lead frame includes a set of bond pads for attaching bond wires to couple to the two integrated circuit chips. Two separated die attach pads support the two chips. Each die attach pad is configured to support one of the two integrated circuit chips with a plurality of cantilevered fingers.

First claim

What is claimed is:

1. An integrated circuit package comprising:
a first die attach pad and a second die attach pad, the first die attach pad including a first set of cantilevered fingers and the second die attach pad including a second set of cantilevered fingers, each of the first set of cantilevered fingers terminating at a first distal end and each of the second set of cantilevered fingers terminating at a second distal end;
a first die on the first die attach pad, the first die including a first portion on the first distal end, the first die including at least one coil; and
a second die on the second die attach pad, the second die including a second portion on the second distal end, the second die including at least one coil; wherein each of the first set of cantilevered fingers and each of the second set of cantilevered fingers include five fingers, wherein the distal ends of two fingers of each of the first set of cantilevered fingers and each of the second set of cantilevered fingers are opposite to each other, and wherein one finger extends in a space between the distal ends of the two fingers, wherein a distal end of the one finger is adjacent to an edge along a length of the first die or the second die respectively.

2. The integrated circuit package of claim 1 , wherein the first die attach pad and the second die attach pad are cantilevered die attach pads.

3. The integrated circuit package of claim 1 , wherein each of the first set of cantilevered fingers is connected to each other within the first die attach pad and each of the second set of cantilevered fingers is connected to each other within the second die attach pad.

4. The integrated circuit package of claim 1 , wherein the one finger extends in a direction generally perpendicular to the distal ends of two fingers.

5. The integrated circuit package of claim 1 , wherein the first die attach pad and the second die attach pad are cantilevered die attach pads.

6. The integrated circuit package of claim 1 , wherein the integrated circuit package functions as a digital isolator.

7. The integrated circuit package of claim 1 , wherein voltage isolation between the first die and the second die is more than 1.5 kV.

8. The integrated circuit package of claim 1 , wherein the at least one coil is oriented parallel to a plane of a surface along a length of the first die or the second die.

9. The integrated circuit package of claim 1 , wherein the first die and the second die are coplanar.

10. The integrated circuit package of claim 1 , wherein the first die attach pad and the second die attach pad are coplanar.

11. The integrated circuit package of claim 1 , wherein the first die attach pad and the second die attach pad are separated by at least 0.5 mm.

12. The integrated circuit package of claim 1 further comprising molding compound covering portions of the first die attach pad, the second die attach pad, the first die, and the second die.

13. The integrated circuit package of claim 1 further comprising:
a plurality of bond pads associated with a plurality of lead lines; and
a plurality of wirebonds, each coupled to the plurality of bond pads and the first die or the second die respectively.

Assignees

• Texas Instruments Inc

Inventors

• Sutton Benjamin Michael
• Koduri Sreenivasan K
• Mukherjee Subhashish

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W20/497

  Inductive arrangements or effects of, or between, wiring layers · CPC title

• H10W70/424

  Cross-sectional shapes (H10W70/481 takes precedence) · CPC title

• H10W70/415

  Leadframe inner leads serving as die pads · CPC title

• H10W70/411 Primary

  Chip-supporting parts, e.g. die pads · CPC title