Magnetoresistive stacks and methods therefor

Patent metadata

Field	Value
Publication number	US-10971545-B2
Application number	US-201916245783-A
Country	US
Kind code	B2
Filing date	Jan 11, 2019
Priority date	Jan 12, 2018
Publication date	Apr 6, 2021
Grant date	Apr 6, 2021

Abstract

A magnetoresistive device may include multiple magnetic tunnel junction (MTJ) stacks separated from each other by one or more dielectric material layers and electrically conductive vias extending through the one more dielectric material layers. Each MTJ stack may include multiple MTJ bits arranged one on top of another and the electrically conductive vias may be configured to electrically access each MTJ bit of the multiple MTJ stacks.

First claim

What is claimed is:

1. A magnetoresistive device, comprising:
multiple magnetic tunnel junction (MTJ) stacks separated from each other by one or more dielectric material layers, wherein each MTJ stack includes multiple MTJ bits arranged one on top of another;
electrically conductive vias extending through the one more dielectric material layers, wherein the electrically conductive vias are configured to (a) access each MTJ bit of the multiple MTJ stacks individually, and (b) access an MTJ bit of the multiple MTJ stacks in series with another MTJ bit of the multiple MTJ stacks;
a first electrically conductive via, of the electrically conductive vias, comprising a section in a horizontal direction that is connected to a first side of a first MTJ bit at a first depth;
a second electrically conductive via, of the electrically conductive vias, comprising a section in a horizontal direction that is connected to a second side of the first MTJ bit at a second depth;
a third electrically conductive via, of the electrically conductive vias, comprising a section in a horizontal direction that is connected to the first side of a second MTJ bit at a third depth; and
a fourth electrically conductive via, of the electrically conductive vias, comprising a section in a horizontal direction that is connected to the second side of the second MTJ bit at a fourth depth,
wherein the first side is opposite to the second side, and
wherein the first depth is higher than the second depth, the second depth is higher than the third depth, and the third depth is higher than the fourth depth.

2. The magnetoresistive device of claim 1 , wherein each MTJ stack includes multiple MTJ bits electrically separated from each other by a dielectric material.

3. The magnetoresistive device of claim 1 , wherein each MTJ stack includes multiple MTJ bits in electrical contact with each other.

4. The magnetoresistive device of claim 1 , wherein the one more dielectric material layers that separate the multiple magnetic tunnel junction (MTJ) stacks include a layer of a single dielectric material.

5. The magnetoresistive device of claim 1 , wherein the one more dielectric material layers that separate the multiple magnetic tunnel junction (MTJ) stacks include an alternating stack of a first dielectric material and a second dielectric material, wherein the first and second dielectric materials have different etch rates.

6. The magnetoresistive device of claim 1 , wherein at least some of the electrically conductive vias that extend through the one more dielectric material layers include a section that extends in a vertical direction and a section that extends in a horizontal direction.

7. The magnetoresistive device of claim 1 , wherein each MTJ stack includes multiple pairs of MTJ bits arranged one on top of another, wherein each pair of MTJ bits includes two horizontally spaced apart MTJ bits in contact with a common electrically conductive via positioned in between the two MTJ bits.

8. A magnetoresistive device, comprising:
multiple magnetic tunnel junction (MTJ) stacks separated from each other by one or more dielectric material layers, wherein each MTJ stack includes multiple MTJ bits arranged one on top of another;
electrically conductive vias extending through the one more dielectric material layers, wherein the electrically conductive vias are configured to (a) electrically access each MTJ bit of the multiple MTJ stacks individually, and (b) electrically access an MTJ bit of the multiple MTJ stacks in series with another MTJ bit of the multiple MTJ stacks;
a first electrically conductive via, of the electrically conductive vias, comprising a section in a horizontal direction that is connected to a first side of a first MTJ bit at a first depth;
a second electrically conductive via, of the electrically conductive vias, comprising a section in a horizontal direction that is connected to a second side of the first MTJ bit at a second depth;
a third electrically conductive via, of the electrically conductive vias, comprising a section in a horizontal direction that is connected to the first side of a second MTJ bit at a third depth; and
a fourth electrically conductive via, of the electrically conductive vias, comprising a section in a horizontal direction that is connected to the second side of the second MTJ bit at a fourth depth,
wherein the first side is opposite to the second side, and
wherein the first depth is higher than the second depth, the second depth is higher than the third depth, and the third depth is higher than the fourth depth.

9. The magnetoresistive device of claim 8 , wherein each MTJ stack includes multiple MTJ bits electrically separated from each other by a dielectric material.

10. The magnetoresistive device of claim 8 , wherein each MTJ stack includes multiple MTJ bits in electrical contact with each other.

11. The magnetoresistive device of claim 8 , wherein the one more dielectric material layers that separate the multiple magnetic tunnel junction (MTJ) stacks include a layer of a single dielectric material.

12. The magnetoresistive device of claim 8 , wherein the one more dielectric material layers that separate the multiple magnetic tunnel junction (MTJ) stacks include an alternating stack of a first dielectric material and a second dielectric material, wherein the first and second dielectric materials have different etch rates.

13. The magnetoresistive device of claim 8 , wherein each MTJ stack includes multiple pairs of MTJ bits arranged one on top of another, wherein each pair of MTJ bits includes two horizontally spaced apart MTJ bits in contact with a common electrically conductive via positioned in between the two MTJ bits.

14. A method of forming a magnetoresistive device, comprising:
forming multiple magnetic tunnel junction (MTJ) stacks separated from each other by one or more dielectric material layers, wherein each MTJ stack includes multiple MTJ bits arranged one on top of another;
forming electrically conductive vias that extend through the one more dielectric material layers, wherein the electrically conductive vias are configured to (a) electrically access each MTJ bit of the multiple MTJ stacks individually, and (b) electrically access an MTJ bit of the multiple MTJ stacks in series with another MTJ bit of the multiple MTJ stacks;
forming a first electrically conductive via, of the electrically conductive vias, to include a section in a horizontal direction that is connected to a first side of a first MTJ bit at a first depth;
forming a second electrically conductive via, of the electrically conductive vias, to include a section in a horizontal direction that is connected to a second side of the first MTJ bit at a second depth;
forming a third electrically conductive via, of the electrically conductive vias, to include a section in a horizontal direction that is connected to the first side of a second MTJ bit at a third depth; and
forming a fourth electrically conductive via, of the electrically conductive vias, to include a section in a horizontal direction that is connected to the second side of the second MTJ bit at a fourth depth,
wherein the first side is opposite to the second side, and
wherein the first depth is higher than the second depth, the second depth is higher than the third depth, and the third depth is higher than the fourth depth.

15. The method of claim 14 , wherein each MTJ stack includes multiple MTJ bits electrically separated from each other by a dielectric material.

16. The method of claim 14 , wherein each MTJ stack includes multiple MTJ bits in elec

Assignees

• Everspin Technologies Inc

Inventors

• Aggarwal Sanjeev
• Conley Kevin
• Deshpande Sarin A

Classifications

• H10W20/081

  by forming openings in the dielectric parts · CPC title

• H10W20/056

  by filling conductive material into holes, grooves or trenches · CPC title

• H10W20/43

  Layouts of interconnections · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title

• H01F10/3272

  by use of anti-parallel coupled [APC] ferromagnetic layers, e.g. artificial ferrimagnets [AFI], artificial [AAF] or synthetic [SAF] anti-ferromagnets · CPC title